Low power content-addressable-memory device
View Patent ↗A plurality of content-addressable-memory sub-arrays simultaneously performs a parallel comparison between data sequences arranged in a row direction of memory cells and a search data sequence input from outside, and outputs a result of the comparison for each data sequence. A first input pin receives an input of the search data sequence. A second input pin receives an input of a search data sequence arbitrarily designating a content-addressable-memory sub-array. Each of the content-addressable-memory sub-arrays includes an activation control unit that controls activation of the content-addressable-memory sub-arrays based on the search data sequence.
1. A content-addressable-memory device comprising:
a plurality of content-addressable-memory sub-arrays that simultaneously perform a parallel comparison between a plurality of data sequences arranged in a row direction of memory cells and a first search data sequence input from outside, and outputs a result of the comparison for each of the data sequences;
a first input pin to which the first search data sequence is input;
a second input pin to which a second search data sequence for selecting an object of search from among the content-addressable-memory sub-arrays is input;
a plurality of memory units arranged corresponding to each of the content-addressable-memory sub-arrays;
a plurality of comparing circuits arranged corresponding to each of the content-addressable-memory sub-arrays; and
a plurality of activation control circuits arranged corresponding to each of the content-addressable-memory sub-arrays,
wherein
the comparing circuit compares a value stored in the memory units and indicating the content-addressable-memory sub-array with a value of the second search data sequence; and
the activation control circuit determines whether to execute the parallel comparison operation in the corresponding content-addressable-memory sub-array based on a result of the comparing circuit.
2. The content-addressable-memory device according to claim 1 , wherein
the activation control circuit controls driving of all search lines in the content-addressable-memory sub-arrays according to the first search data sequence input from the first input pin based on the result comparison of the comparing unit.