IP Library Granted Patent US 7,358,814
Granted Patent B2
US 7,358,814 · App. 11/389,779 · Granted Apr 15, 2008

Differential amplifier and methods for use therewith

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Quick Facts
Patent No.
US 7,358,814
App. No.
11/389,779
Granted
Apr 15, 2008
Kind
B2
Abstract

A differential audio amplifier includes a differential input stage for producing an output voltage in response to a differential audio input signal. The differential input stage has a first bias voltage and a second basis voltage. A bias compensation module controls the first bias voltage to be substantially equal to the second bias voltage.

Claims (11)

1. A differential audio amplifier comprising:

a differential input stage, for producing an output voltage in response to a differential audio input signal, wherein the differential input stage has a first input transistor and a second input transistor coupled to separate polarities of the differential audio input signal, wherein the first transistor has characteristics substantially matched to characteristics of the second transistor, and wherein a first bias voltage biases the first input transistor and a second bias voltage biases the second input transistor of the differential input stage; and

a bias compensation module, operatively coupled to the differential input stage, including a current mirror circuit having a third transistor and a fourth transistor for controlling first bias voltage to be substantially equal to the second bias voltage and for increasing a voltage swing of the output voltage, the bias compensation module including a current equalizer module, operably coupled to the differential input stage for balancing a current offset produced by the bias compensation module wherein the current equalizer module includes a fifth transistor, and wherein the fifth transistor has characteristics substantially matched to characteristics of the fourth transistor.

2. The differential audio amplifier of claim 1 wherein the differential input stage and the bias compensation module are included in a differential folded cascode amplifier circuit.

3. The differential audio amplifier of claim 1 wherein the differential input stage andthe bias compensationmodule are implemented on an integrated circuit.

4. A differential amplifier comprising:

a differential input stage, for producing an output voltage in response to a differential audio input signal, the differential input stage having a first bias voltage and a second basis voltage, wherein the differential input stage has a first input transistor and a second input transistor coupled to the separate polarities of the differential audio input signal, wherein the first transistor has characteristics substantially matched to characteristics of the second transistor, and wherein the first bias voltage biases the first input transistor and the second bias voltage biases the second input transistor of the differential input stage; and

a bias compensation module, operatively coupled to the differential input stage, for controlling first bias voltage to be substantially equal to the second bias voltage, wherein the bias compensation module includes a current equalizer module, operably coupled to the differential input stage for balancing a current offset produced by the bias compensation module, wherein the bias compensation module includes a current mirror circuit having a third transistor and a fourth transistor, wherein the current equalizer module includes a fifth transistor, and wherein the fifth transistor has characteristics substantially matched to characteristics of the fourth transistor.

5. The differential amplifier of claim 4 wherein the bias compensation module increases a voltage swing of the output voltage.

6. The differential amplifier of claim 4 wherein the differential input stage and the bias compensation module are included in a differential folded cascode amplifier circuit.

7. The differential amplifier of claim 4 wherein the differential input stage and the bias compensation module are implemented on an integrated circuit.

Assignments (6)
RELEASE OF SECURITY INTEREST Recorded Jun 6, 2017
From: SILICON VALLEY BANK
To: TEMPO SEMICONDUCTOR, INC.
Reel/Frame 042614/0869 →
SECURITY INTEREST Recorded Feb 18, 2015
From: TEMPO SEMICONDUCTOR, INC.
To: SILICON VALLEY BANK
Reel/Frame 035033/0681 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 13, 2014
From: INTEGRATED DEVICE TECHNOLOGY, INC.
To: STRAVELIS,INC.
Reel/Frame 032662/0007 →
CHANGE OF NAME Recorded Apr 13, 2014
From: STRAVELIS, INC.
To: TEMPO SEMICONDUCTOR, INC.
Reel/Frame 032672/0966 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 21, 2008
From: SIGMATEL, INC.
To: INTEGRATED DEVICE TECHNOLOGY, INC.
Reel/Frame 020828/0913 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 27, 2006
From: SEABERG, CHARLES ERIC
To: SIGMATEL, INC., A DELAWARE CORPORATION
Reel/Frame 017725/0347 →