Granted Patent B2

US 7,734,949 · App. 11/394,261 · Granted Jun 8, 2010

Abstract

Claims (49)

1. An apparatus comprising:

a first memory device comprising an information store;

a second memory device comprising a further information store, the information store being loaded with information from the further information store;

an error detector operable to detect an error in information retrieved from the information store for use by a processor in a software execution flow; and

an error recovery module operatively coupled to the error detector, the error recovery module being operable, responsive to an error detection by the error detector, to suspend the software execution flow of the processor, to disable use of the information store by the processor, to allow the software execution flow of the processor to resume, and to allow the processor to retrieve information for use in the resumed software execution flow directly from the further information store without retrieving the information for use in the resumed software execution flow from the information store;

wherein the error recovery module is further operable to determine a history of errors detected by the error detector, and to abort resumption of the software execution flow where the error is detected by the error detector within a time threshold of a previous error detection by the error detector.

2. The apparatus of claim 1 , wherein at least one of the error detector and the error recovery module is implemented in software for execution by the processor.

3. The apparatus of claim 1 , wherein the error detector is operable to detect an error based on at least one of: a parity check and an error correction code check.

4. The apparatus of claim 1 , wherein the error recovery module is operable to perform an escalation operation where the error is detected by the error detector within the time threshold of the previous error detection by the error detector.

5. The apparatus of claim 1 , wherein the error recovery module is further operable to disable the error detector while the software execution flow is suspended.

6. The apparatus of claim 1 , wherein the error recovery module is further operable to propagate to the further information store information that has been modified in the information store.

7. The apparatus of claim 1 ,

wherein the information store comprises a first memory area for storing instructions and a second memory area for storing data, and

wherein the error recovery module is further operable to determine whether the retrieved information comprises an instruction or data, to cause reloading of only the first memory area of the information store from the further information store where the retrieved information comprises an instruction, and to cause reloading of only the second memory area of the information store from the further information store where the retrieved information comprises data.

8. The apparatus of claim 1 ,

wherein the information store comprises a Level 2 (L2) cache and the further information store comprises a main memory,

wherein the processor comprises an internal Level 1 (L1) cache that has a first memory area for storing instructions and a second memory area for storing data, and

wherein the error recovery module is further operable to determine whether the retrieved information comprises an instruction or data, to cause reloading of the L2 cache and only the first memory area of the L1 cache from the main memory where the retrieved information comprises an instruction, and to cause reloading of the L2 cache and only the second memory area of the L1 cache from the main memory where the retrieved information comprises data.

9. The apparatus of claim 1 , wherein the error recovery module is further operable to cause reloading of the information store from the further information store by re-enabling use of the information store by the processor.

10. An apparatus comprising:

a first memory device comprising an information store;

a second memory device comprising a further information store, the information store being loaded with information from the further information store;

an error detector operable to detect an error in information retrieved from the information store for use by a processor in a software execution flow; and

an error recovery module operatively coupled to the error detector, the error recovery module being operable, responsive to an error detection by the error detector, to suspend the software execution flow of the processor, to disable use of the information store by the processor, to allow the software execution flow of the processor to resume, and to allow the processor to retrieve information for use in the resumed software execution flow directly from the further information store without retrieving the information for use in the resumed software execution flow from the information store

wherein the error recovery module is further operable to determine an amount of information that has been modified in the information store, and to abort resumption of the software execution flow where the determined amount of information that has been modified in the information store is greater than a threshold amount.

11. An electronic device comprising:

the apparatus of claim 1 ; and

a processor operatively coupled to the first memory device and to the second memory device.

12. A method comprising:

monitoring information, which is retrieved from an information store in a first memory device for use by a processor in a software execution flow, to detect errors; and

responsive to detection of an error in the retrieved information:

suspending the software execution flow of the processor;

disabling use of the information store by the processor;

allowing the software execution flow of the processor to resume; and

allowing the processor to retrieve information for use in the resumed software execution flow directly from a further information store in a second memory device without retrieving the information for use in the resumed software execution flow from the information store,

the method further comprising, responsive to detection of the error in the retrieved information:

determining at least one of: a history of detected errors and an amount of information that has been modified in the information store; and

aborting resumption of the software execution flow where the error is detected within a time threshold of detection of a previous error, the determined amount of information that has been modified in the information store is greater than a threshold amount, or both.

13. The method of claim 12 , wherein monitoring comprises performing at least one of: a parity checking operation and an error correction code checking operation.

14. The method of claim 12 , further comprising:

performing an escalation operation where resumption of the software execution flow is aborted.

15. The method of claim 14 , wherein the escalation operation comprises at least one of: raising an alert and resetting the processor.

16. The method of claim 12 , wherein the information store comprises a first memory area for storing instructions and a second memory area for storing data, the method further comprising:

determining whether the retrieved information comprises an instruction or data; and

causing a reload of either only the first memory area or only the second memory area of the information store based on whether the retrieved information comprises an instruction or data.

17. The method of claim 12 , wherein the information store comprises a Level 2 (L2) cache, the further information store comprises a main memory, and the processor comprises an internal Level 1 (L1) cache that has a first memory area for storing instructions and a second memory area for storing data, the method further comprising:

determining whether the retrieved information comprises an instruction or data; and

causing a reload of the L2 cache and either only the first memory area or only the second memory area of the L1 cache based on whether the retrieved information comprises an instruction or data.

18. A machine-readable medium storing instructions which when executed perform the method of claim 12 .

Assignments (8)