Thin film transistor and method of fabricating the same
View Patent ↗A thin film transistor includes a multi-coaxial silicon nanowire unit including a plurality of coaxial silicon nanowires on a substrate, the multi-coaxial silicon nanowire unit including a central portion and end portions of the central portion; a gate electrode on the central portion; and a source electrode and a drain electrode on the respective end portions, respectively, so as to electrically connect to the multi-coaxial silicon nanowire unit.
1. A method of making an array substrate including a thin film transistor, comprising:
disposing a multi-coaxial silicon nanowire unit including a plurality of coaxial silicon nanowires on a substrate, the multi-coaxial silicon nanowire unit including a central portion and end portions of the central portion;
forming a fixing layer on the central portion of the multi-coaxial silicon nanowire unit and on the substrate;
forming a gate electrode on the fixing layer;
forming a first source electrode and a first drain electrode on the respective end portions so as to electrically connect to the multi-coaxial silicon nanowire unit, wherein the gate electrode, the first source electrode, and the first drain electrode are simultaneously formed in a same process step;
forming a second source electrode connected to the first source electrode and a second drain electrode connected to the first drain electrode; and
forming a pixel electrode connected to the second drain electrode.
2. The method according to claim 1 , further comprising forming a gate insulating layer between the first source electrode and the second source electrode and between the first drain electrode and the second drain electrode, the gate insulating layer having first and second contact holes that expose portions of the first source and first drain electrodes, respectively.
3. The method according to claim 2 , wherein the second source electrode is connected to the first source electrode via the first contact hole and the second drain electrode is connected to the first drain electrode via the second contact hole.
4. The method according to claim 1 , further comprising forming a passivation layer between the second drain electrode and the pixel electrode, the passivation layer including a drain contact hole that exposes a portion of the second drain electrode.
5. The method according to claim 4 , wherein the pixel electrode is connected to the second drain electrode via the drain contact hole.