Method for automatic generation of finite element mesh from IC layout data

1. A method of performing a thermal analysis of an integrated circuit device, comprising the steps of:

reading and parsing layout data from the integrated circuit device;

directing a conversion program to input instructions for a finite element analysis program to generate predetermined thermal source areas based on the integrated circuit device layout data;

directing the conversion program to input instructions for the finite element analysis program to partition the integrated circuit device to define thermal source areas that designate drivers;

directing the conversion program to input instructions for the finite element analysis program to generate a finite element mesh of the integrated circuit device;

collecting information about operating conditions from a user;

directing the conversion program to input instructions for the finite element analysis program to perform a thermal analysis of specific thermal sources that designate drivers of the integrated circuit device based on the information collected about operating conditions;

executing the analysis program; and

producing thermal analysis data via execution of the analysis program based on the operating conditions supplied by the user.

2. The method of claim 1 , wherein the step of collecting information about operating conditions from a user further includes:

assigning an amount of heat expected to be dissipated when a predetermined driver is active.

3. The method of claim 1 , further comprising the step of:

constructing a two-dimensional representation of the integrated circuit device surface area.

4. The method of claim 3 , further comprising the step of:

generating a three-dimensional finite element mesh by extruding the integrated circuit device surface area.

5. The method of claim 4 , further comprising the step of:

inputting thickness of the integrated circuit device, material from which the integrated circuit device is constructed, and material from which an underfill is constructed.

6. The method of claim 5 , further comprising the step of:

generating a thermal contour plot from the thermal data entered for each driver.

7. The method of claim 6 , further comprising the step of:

storing the thermal contour plot in a report format.

8. A method for generating a thermal analysis, comprising the steps of:

determining size and placement of each of a plurality of drivers on an integrated circuit device;

storing the determined size and placement of each driver as layout data;

converting the layout data into input for a finite element analysis program;

applying the input to the finite element analysis program;

using the finite element analysis program to construct a finite element mesh of the integrated circuit device from the input;

assigning material properties to the finite element mesh; and

performing a thermal analysis of the finite element mesh.

9. The method of claim 8 , further comprising the step of:

defining an integrated circuit device surface area and determining the integrated circuit device material.

10. The method of claim 9 , further comprising the step of:

defining driver areas on the integrated circuit device and entering the amount of heat that will dissipate in each of the plurality of drivers.

11. The method of claim 9 , further comprising the step of:

constructing a two-dimensional representation of the integrated circuit device surface area.

12. The method of claim 11 , wherein the step of constructing a finite element mesh of the integrated circuit device from the layout data further comprises:

generating a three-dimensional finite element mesh by extruding the integrated circuit device surface area.

13. The method of claim 8 , further comprising the step of:

generating a thermal contour plot.

14. The method of claim 13 , further comprising the step of:

storing the thermal contour plot in a report format.

15. The method of claim 14 , further comprising the step of:

defining notch areas on the integrated circuit device.

16. The method of claim 15 , further comprising the step of:

defining driver areas on the integrated circuit device.

17. An integrated thermal analysis system comprising:

a layout tool that generates integrated circuit layout data relating to driver areas and notch areas on an integrated circuit device;

a conversion program that converts the integrated circuit layout data into finite element analysis input data;

a finite element analysis program that creates a two-dimensional representation of a surface area of the integrated circuit device and further creates a three-dimensional finite element mesh from the surface area;

a graphical user interface that accepts thermal analysis data entered by a user, wherein the thermal analysis data is assigned to the three-dimensional finite element mesh.

18. The integrated thermal analysis system of claim 17 , further comprising:

a thermal contour plot that is derived from the three-dimensional finite element mesh.

19. The integrated thermal analysis system of claim 18 , further comprising:

a diagnostic report developed from the thermal contour plot.