IP Library Granted Patent US 7,315,214
Granted Patent B2
US 7,315,214 · App. 11/400,062 · Granted Jan 1, 2008

Phase locked loop

Assignee: STMicroelectronics S.A.
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Quick Facts
Patent No.
US 7,315,214
App. No.
11/400,062
Granted
Jan 1, 2008
Kind
B2
Abstract

A phase locked loop includes a controlled oscillator for delivering an output signal at a determined output frequency, and a variable frequency divider for converting the output signal into a signal at divided frequency. The PLL is termed composite in that it includes at least one first loop having a loop filter for generating a first control signal for the oscillator on the basis of the signal at divided frequency, and a second loop having a loop filter, different from the loop filter of the first loop, for generating, on the basis of the signal at divided frequency, a second signal for additional control of the oscillator. The loop filter of the first loop and the loop filter of the second loop have different respective cutoff frequencies. The passband of the first loop, can be adapted to ensure the convergence and the stability of the PLL, while the second loop can afford extra passband increasing the speed of adaptation of the PLL in case of modification of the value of a preset for the output frequency.

Claims (60)

1. A phase locked loop comprising:

a controlled oscillator for delivering an output signal at a determined output frequency; and

a frequency divider for converting the output signal into a signal at divided frequency, including:

a first loop having a loop filter for generating a first signal for control of the oscillator on the basis of the signal at divided frequency, wherein the first loop comprises a first phase/frequency comparator for producing a first signal of measurement of a phase/frequency deviation between the signal at divided frequency, on the one hand, and a first reference signal at a first determined reference frequency, on the other hand; and

a second loop having a loop filter different from the loop filter of the first loop, for generating, on the basis of the signal at divided frequency, a second signal for additional control of the oscillator, wherein the second loop comprises a second phase/frequency comparator for producing a second signal of measurement of a phase/frequency deviation between a signal obtained by frequency multiplication on the basis of the signal at divided frequency, on the one hand, and a second reference signal at a second determined reference frequency, higher than the said first reference frequency, on the other hand,

wherein the loop filter of the said first loop and the loop filter of the said second loop have different respective cutoff frequencies.

2. A phase locked loop according to claim 1 , wherein the loop filter of the first loop is a low-pass filter whose cutoff frequency is lower than the first reference frequency, and wherein the loop filter of the second loop is a bandpass filter centered between the first reference frequency, on the one hand, and the second reference frequency, on the other hand, and which has a low cutoff frequency higher than the first reference frequency and a high cutoff frequency lower than the second reference frequency.

3. A phase locked loop according to claim 1 , comprising a frequency multiplier multiplying by M having an input receiving the signal at divided frequency and an output coupled to the input of the second phase/frequency comparator, where M is the ratio of the frequency of the second reference signal to the frequency of the first reference signal.

4. A phase locked loop according to claim 1 , comprising means for temporarily deactivating the second loop on power-up and/or in case of change of a preset for the output frequency.

5. A phase locked loop comprising:

a controlled oscillator for delivering an output signal at a determined output frequency; and

a frequency divider for converting the output signal into a signal at divided frequency, including:

a first loop having a loop filter for generating a first signal for control of the oscillator on the basis of the signal at divided frequency, wherein the first loop comprises a phase/frequency comparator for producing a first signal of measurement of a phase/frequency deviation between the signal at divided frequency, on the one hand, and a first reference signal at a first determined reference frequency, on the other hand; and

a second loop having a loop filter different from the loop filter of the first loop, for generating, on the basis of the signal at divided frequency, a second signal for additional control of the oscillator, wherein the second loop comprises a frequency detector for producing a second signal of measurement of a frequency deviation between a signal obtained by frequency multiplication on the basis of the signal at divided frequency, on the one hand, and a second reference signal at a second determined reference frequency, higher than the said first reference frequency, on the other hand,

wherein the loop filter of the said first loop and the loop filter of the said second loop have different respective cutoff frequencies.

6. A phase locked loop according to claim 5 , wherein the loop filter of the first loop is a low-pass filter whose cutoff frequency is lower than the first reference frequency, and wherein the loop filter of the second loop is a bandpass filter centred between the first reference frequency, on the one hand, and the second reference frequency, on the other hand, and which has a low cutoff frequency higher than the first reference frequency and a high cutoff frequency lower than the second reference frequency.

7. A phase locked loop according to claim 5 , comprising a frequency multiplier multiplying by M having an input receiving the signal at divided frequency and an output coupled to the input of the frequency detector, where M is the ratio of the frequency of the second reference signal to the frequency of the first reference signal.

8. A phase locked loop according to claim 5 , comprising means for temporarily deactivating the second loop on power-up and/or in case of change of a preset for the output frequency.

9. A frequency synthesizer comprising:

a phase locked loop including:

a controlled oscillator for delivering an output signal at a determined output frequency; and

a frequency divider for converting the output signal into a signal at divided frequency, including:

a first loop having a loop filter for generating a first signal for control of the oscillator on the basis of the signal at divided frequency, wherein the first loop comprises a first phase/frequency comparator for producing a first signal of measurement of a phase/frequency deviation between the signal at divided frequency, on the one hand, and a first reference signal at a first determined reference frequency, on the other hand; and

a second loop having a loop filter different from the loop filter of the said first loop, for generating, on the basis of the signal at divided frequency, a second signal for additional control of the oscillator, wherein the second loop comprises a second phase/frequency comparator for producing a second signal of measurement of a phase/frequency deviation between a signal obtained by frequency multiplication on the basis of the signal at divided frequency, on the one hand, and a second reference signal at a second determined reference frequency, higher than the said first reference frequency, on the other hand,

wherein the loop filter of the said first loop and the loop filter of the said second loop have different respective cutoff frequencies.

10. A frequency synthesizer according to claim 9 , wherein the loop filter of the first loop is a low-pass filter whose cutoff frequency is lower than the first reference frequency, and wherein the loop filter of the second loop is a bandpass filter centred between the first reference frequency, on the one hand, and the second reference frequency, on the other hand, and which has a low cutoff frequency higher than the first reference frequency and a high cutoff frequency lower than the second reference frequency.

11. A frequency synthesizer according to claim 9 , comprising a frequency multiplier multiplying by M having an input receiving the signal at divided frequency and an output coupled to the input of the second phase/frequency comparator, where M is the ratio of the frequency of the second reference signal to the frequency of the first reference signal.

12. A frequency synthesizer according to claim 9 , comprising means for temporarily deactivating the second loop on power-up and/or in case of change of a preset for the output frequency.

13. A frequency synthesizer comprising:

a phase locked loop including:

a controlled oscillator for delivering an output signal at a determined output frequency; and

a frequency divider for converting the output signal into a signal at divided frequency, including:

a first loop having a loop filter for generating a first signal for control of the oscillator on the basis of the signal at divided frequency, wherein the first loop comprises a phase/frequency comparator for producing a first signal of measurement of a phase/frequency deviation between the signal at divided frequency, on the one hand, and a first reference signal at a first determined reference frequency, on the other hand; and

a second loop having a loop filter different from the loop filter of the said first loop, for generating, on the basis of the signal at divided frequency, a second signal for additional control of the oscillator, wherein the second loop comprises a frequency detector for producing a second signal of measurement of a frequency deviation between a signal obtained by frequency multiplication on the basis of the signal at divided frequency, on the one hand, and a second reference signal at a second determined reference frequency, higher than the said first reference frequency, on the other hand,

wherein the loop filter of the said first loop and the loop filter of the said second loop have different respective cutoff frequencies.

14. A frequency synthesizer according to claim 13 , wherein the loop filter of the first loop is a low-pass filter whose cutoff frequency is lower than the first reference frequency, and wherein the loop filter of the second loop is a bandpass filter centred between the first reference frequency, on the one hand, and the second reference frequency, on the other hand, and which has a low cutoff frequency higher than the first reference frequency and a high cutoff frequency lower than the second reference frequency.

15. A frequency synthesizer according to claim 13 , comprising a frequency multiplier multiplying by M having an input receiving the signal at divided frequency and an output coupled to the input of the frequency detector, where M is the ratio of the frequency of the second reference signal to the frequency of the first reference signal.

16. A frequency synthesizer according to claim 13 , comprising means for temporarily deactivating the second loop on power-up and/or in case of change of a preset for the output frequency.

17. A radiofrequency transmitter and/or receiver comprising:

a frequency synthesizer including:

a phase locked loop including:

a controlled oscillator for delivering an output signal at a determined output frequency; and

a frequency divider for converting the output signal into a signal at divided frequency, including:

a first loop having a loop filter for generating a first signal for control of the oscillator on the basis of the signal at divided frequency, wherein the first loop comprises a first phase/frequency comparator for producing a first signal of measurement of a phase/frequency deviation between the signal at divided frequency, on the one hand, and a first reference signal at a first determined reference frequency, on the other hand; and

a second loop having a loop filter different from the loop filter of the said first loop, for generating, on the basis of the signal at divided frequency, a second signal for additional control of the oscillator, wherein the second loop comprises a second phase/frequency comparator for producing a second signal of measurement of a phase/frequency deviation between a signal obtained by frequency multiplication on the basis of the signal at divided frequency, on the one hand, and a second reference signal at a second determined reference frequency, higher than the said first reference frequency, on the other hand,

wherein the loop filter of the said first loop and the loop filter of the said second loop have different respective cutoff frequencies.

18. A radiofrequency transmitter and/or receiver according to claim 17 , wherein the loop filter of the first loop is a low-pass filter whose cutoff frequency is lower than the first reference frequency, and wherein the loop filter of the second loop is a bandpass filter centered between the first reference frequency, on the one hand, and the second reference frequency, on the other hand, and which has a low cutoff frequency higher than the first reference frequency and a high cutoff frequency lower than the second reference frequency.

19. A radiofrequency transmitter and/or receiver according to claim 17 , comprising a frequency multiplier multiplying by M having an input receiving the signal at divided frequency and an output coupled to the input of the second phase/frequency comparator, where M is the ratio of the frequency of the second reference signal to the frequency of the first reference signal.

20. A radiofrequency transmitter and/or receiver according to claim 17 , comprising means for temporarily deactivating the second loop on power-up and/or in case of change of a preset for the output frequency.

21. A radiofrequency transmitter and/or receiver comprising:

a frequency synthesizer including:

a phase locked loop including:

a controlled oscillator for delivering an output signal at a determined output frequency; and

a frequency divider for converting the output signal into a signal at divided frequency, including:

a first loop having a loop filter for generating a first signal for control of the oscillator on the basis of the signal at divided frequency, wherein the first loop comprises a phase/frequency comparator for producing a first signal of measurement of a phase/frequency deviation between the signal at divided frequency, on the one hand, and a first reference signal at a first determined reference frequency, on the other hand; and

a second loop having a loop filter different from the loop filter of the said first loop, for generating, on the basis of the signal at divided frequency, a second signal for additional control of the oscillator, wherein the second loop comprises a frequency detector for producing a second signal of measurement of a frequency deviation between a signal obtained by frequency multiplication on the basis of the signal at divided frequency, on the one hand, and a second reference signal at a second determined reference frequency, higher than the said first reference frequency, on the other hand,

wherein the loop filter of the said first loop and the loop filter of the said second loop have different respective cutoff frequencies.

22. A radiofrequency transmitter and/or receiver according to claim 21 , wherein the loop filter of the first loop is a low-pass filter whose cutoff frequency is lower than the first reference frequency, and wherein the loop filter of the second loop is a bandpass filter centered between the first reference frequency, on the one hand, and the second reference frequency, on the other hand, and which has a low cutoff frequency higher than the first reference frequency and a high cutoff frequency lower than the second reference frequency.

23. A radiofrequency transmitter and/or receiver according to claim 21 , comprising a frequency multiplier multiplying by M having an input receiving the signal at divided frequency and an output coupled to the input of the frequency detector, where M is the ratio of the frequency of the second reference signal to the frequency of the first reference signal.

24. A radiofrequency transmitter and/or receiver according to claim 21 , comprising means for temporarily deactivating the second loop on power-up and/or in case of change of a preset for the output frequency.

Assignments (2)
CHANGE OF NAME Recorded Jan 19, 2024
From: STMICROELECTRONICS SA
To: STMICROELECTRONICS FRANCE
Reel/Frame 066353/0207 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 15, 2006
From: BADETS, FRANCK; BELOT, DIDIER; LAGARESTE, VINCENT; DEVAL, YANN; MELCHIOR, PIERRE; BEGUERET, JEAN-BAPTISTE
To: STMICROELECTRONICS S.A.
Reel/Frame 017803/0374 →
Priority Claims (1)
FR 05 03480 · Apr 7, 2005 · national
Continuity (1)
Related Publication 20060232344A1 · Oct 19, 2006