High voltage start up circuit for power converters

1. A start up circuit, comprising:

a JFET transistor having a first terminal, a second terminal and a third terminal, in which the first terminal is coupled to receive a voltage source;

a first transistor having a drain terminal, a source terminal and a gate terminal, in which the drain terminal of the first transistor is connected to the second terminal of the JFET transistor, the source terminal of the first transistor is coupled to provide a supply voltage to a control circuit of a power converter;

a diode coupled from a transformer winding of the power converter to the control circuit for providing a further supply voltage to the control circuit;

a second transistor having a drain terminal, a source terminal and a gate terminal, in which the drain terminal of the second transistor is coupled to the gate terminal of the first transistor and the third terminal of the JFET transistor, the gate terminal of the second transistor is coupled to receive a control signal, and the source terminal of the second transistor is coupled to a ground; and

a resistive device connected from the third terminal of the JFET transistor to the second terminal of the JFET transistor;

wherein the resistive device provides a bias voltage to turn on the first transistor and the JFET transistor when the second transistor is turned off, the control signal is coupled to turn on the second transistor for switching off the first transistor.

2. The start up circuit as claimed in claim 1 , in which the resistive device provides a negative bias to the JFET transistor once the second transistor is turned on.

3. The start up circuit as claimed in claim 1 , in which the second transistor is turned on after the control circuit of the power converter starts to operate.

4. The start up circuit as claimed in claim 1 , in which the JFET transistor has a negative threshold voltage.

5. The start up circuit as claimed in claim 1 , in which the JFET transistor is a voltage controlled resistance device.

6. The start up circuit as claimed in claim 1 , in which the JFET transistor still has a current flowed through the JFET transistor when the first transistor is turned off.

7. The start up circuit as claimed in claim 1 , in which the resistive device can be implemented by a resistor or a transistor.

8. A start up circuit comprising:

a JFET transistor coupled to receive a voltage source;

a first transistor connected in serial with the JFET transistor to provide a supply voltage to a control circuit of a power converter in response to the voltage source;

a resistive device coupled to the JFET transistor and the first transistor to provide a bias voltage to turn on the JFET transistor and the first transistor; and

a second transistor coupled to the first transistor to turn off the first transistor;

wherein a control signal is coupled to the second transistor to control the second transistor.

9. The start up circuit as claimed in claimed 8 further comprises a diode coupled from a transformer winding of the power converter to the control circuit to provide a further supply voltage to the control circuit.

10. The start up circuit as claimed in claim 8 , in which the second transistor provides a negative bias to the JFET transistor through the resistive device.

11. The start up circuit as claimed in claim 8 , in which the JFET transistor has a negative threshold voltage.

12. The start up circuit as claimed in claim 8 , in which the JFET transistor is a voltage controlled resistance device.

13. The start up circuit as claimed in claim 8 , in which the JFET transistor still has a current flowed through the JFET transistor when the first transistor is turned off.

14. The start up circuit as claimed in claim 8 , in which the resistive device can be implemented by a resistor or a transistor.