Method of manufacturing a semiconductor device and semiconductor device

1. A method of manufacturing a semiconductor device, comprising:

forming a substrate protection film so as to cover an n-type FET forming region having a first gate electrode formed on a semiconductor substrate and a p-type FET forming region having a second gate electrode formed on said semiconductor substrate;

opening said p-type FET forming region by patterning a resist film after the resist film is formed so as to cover said n-type FET forming region and said p-type FET forming region;

exposing a surface of said semiconductor substrate by selectively removing said substrate protection film in said p-type FET forming region, so as to leave said substrate protection film on side walls of said second gate electrode;

forming a pair of p-type extension regions in the vicinity of a surface of said semiconductor substrate at both sides of said second gate electrode by doping impurities to said semiconductor substrate, with said resist film, said second gate electrode, and said substrate protection film formed on the side walls of said second electrode serving as masks; and

removing said resist film formed on said n-type FET forming region,

wherein a portion of the substrate protection film over the n-type FET forming region remains over an n-type diffusion layer away from side walls of the first gate electrode.

2. The method of manufacturing a semiconductor device according to claim 1 , further comprising

forming a pair of n-type extension regions in the vicinity of a surface of said semiconductor substrate at both sides of said first gate electrode, before said opening said p-type FET forming region.

3. The method of manufacturing a semiconductor device according to claim 1 ,

wherein said forming the substrate protection film comprises:

opening said n-type FET forming region by patterning a resist film after the resist film is formed so as to cover the n-type FET forming region having the first gate electrode formed on the semiconductor substrate and the p-type FET forming region having the second gate electrode formed on said semiconductor substrate; and

forming a pair of n-type extension regions in the vicinity of a surface of said semiconductor substrate at both sides of said first gate electrode by doping impurities to said semiconductor substrate, with said resist film and said first gate electrode serving as masks.

4. A method of manufacturing a semiconductor device, comprising:

forming a substrate protection film so as to cover an n-type FET forming region having a first gate electrode formed on a semiconductor substrate and a p-type FET forming region having a second gate electrode formed on said semiconductor substrate;

opening said p-type FET forming region by patterning a resist film after the resist film is formed so as to cover said n-type FET forming region and said p-type FET forming region;

exposing a surface of said semiconductor substrate by selectively removing said substrate protection film in said p-type FET forming region, so as to leave said substrate protection film on side walls of said second gate electrode;

forming a pair of p-type extension regions in the vicinity of a surface of said semiconductor substrate at both sides of said second gate electrode by doping impurities to said semiconductor substrate, with said resist film, said second gate electrode, and said substrate protection film formed on the side walls of said second electrode serving as masks; and

removing said resist film formed on said n-type FET forming region,

wherein said substrate protection film is formed of a first insulating film and a second insulating film; and

said forming said substrate protection film comprises:

forming the first insulating film so as to cover said n-type FET forming region having said first gate electrode formed on said semiconductor substrate and said p-type FET forming region having said second gate electrode formed on said semiconductor substrate;

opening said n-type FET forming region by patterning said resist film after the resist film is formed so as to cover said n-type FET forming region and said p-type FET forming region;

forming a pair of n-type extension regions in the vicinity of a surface of said semiconductor substrate located immediately below said first insulating film in said n-type FET forming region, by doping impurities to said semiconductor substrate, with said resist film, said first gate electrode, and said first insulating film on side walls of said first gate electrode serving as masks; and

forming said second insulating film so as to cover said n-type FET forming region and said p-type FET forming region.

5. A method of manufacturing a semiconductor device, comprising:

forming a substrate protection film so as to cover an n-type FET forming region having a first gate electrode formed on a semiconductor substrate and a p-type FET forming region having a second gate electrode formed on said semiconductor substrate;

opening said p-type FET forming region by patterning a resist film after the resist film is formed so as to cover said n-type FET forming region and said p-type FET forming region;

exposing a surface of said semiconductor substrate by selectively removing said substrate protection film in said p-type FET forming region, so as to leave said substrate protection film on side walls of said second gate electrode;

forming a pair of p-type extension regions in the vicinity of a surface of said semiconductor substrate at both sides of said second gate electrode by doping impurities to said semiconductor substrate, with said resist film, said second gate electrode, and said substrate protection film formed on the side walls of said second electrode serving as masks; and

removing said resist film formed on said n-type FET forming region,

wherein, after said removing the resist film formed on said n-type FET forming region, said method further comprises:

forming first and second sidewalls with a sidewall insulating film and said substrate protection film on the side walls of said first gate electrode and said second gate electrode by performing etchback on said sidewall insulating film formed so as to cover said n-type FET forming region and said p-type FET forming region;

opening said n-type FET forming region by patterning a resist film after the resist film is formed so as to cover said n-type FET forming region and said p-type FET forming region;

forming a pair of n-type source/drain regions in the vicinity of a surface of said semiconductor substrate at both sides of said first sidewall and, with said resist film, said first gate electrode, and said first sidewall serving as masks;

opening said p-type FET forming region by patterning a resist film after the resist film is formed so as to cover said n-type FET forming region and said p-type FET forming region; and

forming a pair of p-type source/drain regions in the vicinity of a surface of said semiconductor substrate at both sides of said second sidewall by doping impurities to said semiconductor substrate, with said resist film, said second gate electrode, and said second sidewall serving as masks.

6. The method of manufacturing a semiconductor device according to claim 1 , wherein said substrate protection film is formed of a first insulating film; and

said forming the substrate protection film comprises:

opening said n-type FET forming region by patterning a resist film after the resist film is formed so as to cover said n-type FET forming region and said p-type PET forming region;

forming a pair of n-type extension regions in the vicinity of a surface of said semiconductor substrate in said n-type FET forming region, with said resist film, said first gate electrode serving as masks; and

forming said first insulating film so as to cover said n-type PET forming region and said p-type PET forming region.

7. A method of manufacturing a semiconductor device, comprising:

forming a substrate protection film so as to cover an n-type PET forming region having a first gate electrode formed on a semiconductor substrate and a p-type PET forming region having a second gate electrode formed on said semiconductor substrate;

opening said p-type PET forming region by patterning a resist film after the resist film is formed so as to cover said n-type FET forming region and said p-type FET forming region;

exposing a surface of said semiconductor substrate by selectively removing said substrate protection film in said p-type FET forming region, so as to leave said substrate protection film on side walls of said second gate electrode;

forming a pair of p-type extension regions in the vicinity of a surface of said semiconductor substrate at both sides of said second gate electrode by doping impurities to said semiconductor substrate, with said resist film, said second gate electrode, and said substrate protection film formed on the side walls of said second electrode serving as masks; and

removing said resist film formed on said n-type FET forming region,

wherein said n-type FET forming region having said first gate electrode and said p-type FET forming region having said second gate electrode are formed in a core forming region;

said method of manufacturing a semiconductor device further comprises:

forming a substrate protection film so as to cover said n-type FET forming region and said p-type FET forming region in said core forming region, an n-type FET forming region having a third gate electrode formed on said semiconductor substrate in an I/O forming region, and a p-type FET forming region having a fourth gate electrode formed on said semiconductor substrate in said I/O forming region;

opening said p-type FET forming region in said core forming region by patterning a resist film after the resist film is formed so as to cover said n-type FET forming region in said core forming region, said p-type FET forming region in said core forming region, said n-type FET forming region in said I/O forming region, and said p-type FET forming region in said I/O forming region;

exposing a surface of said semiconductor substrate by selectively removing said substrate protection film in said p-type FET forming region in said core forming region so as to leave said substrate protection film only on side walls of said second gate electrode;

forming a pair of p-type extension regions at both sides of said second gate electrode in the vicinity of a surface of said semiconductor substrate by doping impurities to said semiconductor substrate, with said resist film, said second gate electrode, and said substrate protection film formed on the side walls of said second gate electrode serving as masks; and

removing said resist film formed in said n-type FET forming region in said core forming region, in said n-type FET forming region in said I/O forming region, and in said p-type FET forming region in said I/O forming region.