IP Library Granted Patent US 7,573,347
Granted Patent B2
US 7,573,347 · App. 11/401,393 · Granted Aug 11, 2009

Digitally controlled oscillator device and method for generating an oscillating signal with a digitally controlled phase locked loop

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Quick Facts
Patent No.
US 7,573,347
App. No.
11/401,393
Granted
Aug 11, 2009
Kind
B2
Abstract

A digitally controlled oscillator device includes a programming input, a selection input and an oscillator core with a first capacitive element which is frequency determining and programmable. The first capacitive element is coupled to the programming input that receives a first data word by which an oscillating frequency of the oscillator device is programmed with a predetermined frequency step size. The oscillator device further includes a selection unit for selecting a mode which is coupled to the selection input that receives a mode selection signal. The mode is selectable from a plurality of modes depending on the mode selection signal and each mode from the plurality of modes is characterized by a predetermined frequency step size. The digitally controlled oscillator device also includes a deattenuation amplifier.

Claims (63)

1. A digitally controlled oscillator device, comprising:

a programming input configured to receive a first multibit data word for programming an oscillating frequency of the oscillator device, wherein the programming occurs in discrete amounts dictated by a same predetermined frequency step size for each incremental adjustment in the first multibit data word;

an oscillator core comprising a first programmable capacitive element configured to influence a frequency of the oscillator device, the first capacitive element coupled to the programming input for receiving the first multi bit data word;

a deattenuation amplifier coupled to the oscillator core;

a selection input configured to receive a mode selection signal; and

a selection unit coupled between the selection input and a mode input of the oscillator core, wherein the selection unit is configured to select a mode from a plurality of modes depending on the mode selection signal, and wherein each mode of the plurality of modes dictates a size of the predetermined frequency step size of the oscillator core.

2. The oscillator device of claim 1 , wherein the oscillator core comprises a second capacitive element configured to influence a frequency of the oscillator device.

3. The oscillator device of claim 2 , wherein the second capacitive element is programmable and coupled to the programming input that is configured to receive a second data word, and wherein the second capacitive element is configured to influence the oscillating frequency of the oscillator device based on the second data word.

4. The oscillator device of claim 3 , wherein the first capacitive element is configured to provide a fine tuning of the oscillating frequency with the predetermined frequency step size; and

wherein the second capacitive element is configured to provide a coarse tuning of the oscillating frequency with a frequency step size that is greater than the predetermined frequency step size.

5. The oscillator device of claim 2 , wherein the first or the second capacitive element, or both, comprises a plurality of switchable capacitor devices.

6. The oscillator device of claim 5 , wherein the plurality of switchable capacitor devices of the second capacitive element comprise a binary weighting with respect to one another.

7. The oscillator device of claim 5 , wherein the plurality of switchable capacitor devices of the first or second capacitive element, or both, comprises a plurality of switchable varactors.

8. The oscillator device of claim 5 , further comprising a control voltage coupled to the plurality of switchable capacitor devices, the control voltage configured to control a value of capacitance for the plurality of switchable capacitor devices of the first capacitive element depending on the selected mode dictated by the mode selection signal.

9. The oscillator device of claim 1 , further comprising a current source coupled to the selection unit, wherein the current source is configured to control a value of a current depending on the selected mode dictated by the mode selection signal, and further configured to adjust an oscillating amplitude of the oscillator device, wherein the current is provided to the oscillator core.

10. The oscillator device of claim 1 , further comprising a voltage controller coupled to the selection unit, wherein the voltage controller is configured to control a value of a voltage depending on the selected mode dictated by the mode selection signal, and further configured to adjust an oscillating amplitude of the oscillator device, wherein the voltage is provided to the oscillator core.

11. The oscillator device of claim 1 , further comprising a parallel capacitor selectively connected in parallel to the first capacitive element depending on the selected mode dictated by the mode selection signal.

12. The oscillator device of claim 1 , further comprising a series capacitor selectively connected in series to the first capacitive element depending on the selected mode dictated by the mode selection signal.

13. A digitally controlled phase locked loop, comprising: an oscillator device comprising:

a programming input configured to receive a first multibit data word for programming an oscillating frequency of the oscillator device, wherein the programming occurs in discrete amounts dictated by a same predetermined frequency step size for each incremental adjustment in the first multibit data word;

an oscillator core comprising a first programmable capacitive element configured to influence a frequency of the oscillator device, the first capacitive element coupled to the programming input for receiving the first multi bit data word;

a deattenuation amplifier coupled to the oscillator core;

a selection input configured to receive a mode selection signal; and

a selection unit coupled between the selection input and a mode input of the oscillator core, wherein the selection unit is configured to select a mode from a plurality of modes depending on the mode selection signal, and wherein each mode of the plurality of modes dictates a size of the predetermined frequency step size of the oscillator core;

wherein the oscillator device comprises an oscillator output configured to provide an oscillating signal with the oscillating frequency;

a phase locked loop signal output coupled to the oscillator device output;

a digital phase detector comprising a first input configured to receive a reference frequency signal, a second input coupled to the phase locked loop signal output, and an output; and

a digital loop filter comprising an input coupled to the output of the phase detector, and an output coupled to the programming input of the oscillator device.

14. The digitally controlled phase locked loop of claim 13 , further comprising a frequency divider coupled between the oscillator device output and the second input of the digital phase detector.

15. The digitally controlled phase locked loop claim 13 , further comprising a sigma-delta-modulator coupled between the loop filter output and the programming input of the oscillator device.

16. A method for generating an oscillating signal with an oscillator device, comprising:

selecting a mode from a plurality of modes, wherein each mode dictates a size of a frequency step size for programming an oscillating frequency of the oscillating signal;

ascertaining the frequency step size based on the selected mode;

programming the oscillating frequency in discrete steps based on a data word and the selected mode with the discrete steps based on the predetermined frequency step size; and

programming the oscillating frequency by controlling an oscillating amplitude of the oscillating signal based on the selected mode.

17. The method of claim 16 , further comprising providing a first programmable capacitive element configured to influence the oscillating frequency, wherein the oscillating frequency is programmed by programming the first capacitive element.

18. The method of claim 17 , further comprising selectively connecting a parallel capacitor in parallel to the first capacitive element based on the selected mode.

19. The method of claim 17 , further comprising selectively connecting a series capacitor in series to the first capacitive element based on the selected mode.

20. The method of claim 17 , wherein the first capacitive element comprises a plurality of switchable varactors.

21. The method of claim 20 , further comprising adjusting a control voltage to control a value of capacitance associated with the plurality of switchable varactors of the first capacitive element based on the selected mode.

22. The method of claim 17 , further comprising providing a second programmable capacitive element configured to influence the oscillating frequency, wherein the oscillating frequency is programmed by programming the second capacitive element, and wherein the second capacitive element is programmed with a frequency step size that is greater than the predetermined frequency step size.

23. The method of claim 16 , further comprising:

comparing the oscillating signal with a reference frequency signal, thereby obtaining a comparison result;

filtering the comparison result using a digital loop filter; and

generating the data word for programming the oscillating frequency based on the filtered comparison result.

24. The method of claim 23 , further comprising frequency dividing the oscillating signal before comparing it with the reference frequency signal.

25. The method of claim 23 , wherein the data word is generated at least partially using sigma-delta-modulation.

26. The method of claim 16 , wherein the mode is selected based on a mobile communication standard.

27. A digitally controlled oscillator device, comprising:

means for receiving a multibit data word;

means for generating an oscillating signal with an oscillating frequency, wherein the oscillating frequency is programmable with a frequency based on the multibit data word and variable in discrete amounts dictated by a predetermined frequency step size;

means for selecting a mode from a plurality of modes, wherein each mode of the plurality of modes dictates an amount of the predetermined frequency step size; and

means for deattenuating the oscillating signal.

28. The oscillator device of claim 27 , wherein the generating means comprises a capacitive element having a capacitance that is dependent on the data word and is variable in discrete amounts dictated by the predetermined frequency step size.

29. The oscillator device of claim 28 , wherein the selecting means is controlled by an oscillating amplitude of the oscillating signal based on the selected mode.

30. The oscillator device of claim 28 , wherein the selecting means is operable to selectively connect a capacitor in parallel to the capacitive element based on the selected mode.

31. The oscillator device of claim 28 , wherein the selecting means is operable to selectively connect a capacitor in series to the capacitive element based on the selected mode.

32. A method for generating an oscillating signal with an oscillator device, comprising:

selecting a mode from a plurality of modes, wherein each mode dictates a size of a frequency step size for programming an oscillating frequency of the oscillating signal;

ascertaining the frequency step size based on the selected mode;

programming the oscillating frequency in discrete steps based on a data word and the selected mode with the discrete steps based on the predetermined frequency step size;

providing a first programmable capacitive element configured to influence the oscillating frequency, wherein the oscillating frequency is programmed by programming the first capacitive element; and

adjusting the frequency step size by selectively connecting a parallel capacitor in parallel to the first capacitive element or connecting a series capacitor in series to the first capacitive element based on the selected mode.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 17, 2020
From: INTEL CORPORATION
To: APPLE INC.
Reel/Frame 053518/0586 →
CONFIRMATORY ASSIGNMENT EFFECTIVE AS OF JANUARY 1, 2018 Recorded Aug 12, 2020
From: INTEL DEUTSCHLAND GMBH
To: INTEL CORPORATION
Reel/Frame 053477/0001 →
CHANGE OF NAME Recorded Nov 6, 2015
From: INTEL MOBILE COMMUNICATIONS GMBH
To: INTEL DEUTSCHLAND GMBH
Reel/Frame 037057/0061 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 19, 2012
From: INTEL MOBILE COMMUNICATIONS TECHNOLOGY GMBH
To: INTEL MOBILE COMMUNICATIONS GMBH
Reel/Frame 027556/0709 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 18, 2012
From: INFINEON TECHNOLOGIES AG
To: INTEL MOBILE COMMUNICATIONS TECHNOLOGY GMBH
Reel/Frame 027548/0623 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 20, 2006
From: MAYER, THOMAS; CHEN, YANGJIAN; PITTORINO, TINDARO; MAURER, LINUS; NEUBAUER, VOLKER
To: INFINEON TECHNOLOGIES AG
Reel/Frame 018582/0076 →