Merged P-i-N Schottky structure

1. A method for manufacturing a semiconductor device, said method comprising:

forming a plurality of stripes of one conductivity type having a first depth in a semiconductive body of another conductivity type, wherein each of said plurality of stripes is spread apart by a threshold distance from at least one adjacent one of said plurality of stripes, wherein a position of each of said plurality of stripes increases absorption of reverse avalanche energy by said semiconductor device; and

forming a Schottky contact layer over said semiconductive body, wherein said Schottky contact layer is in contact with said plurality of stripes, and wherein said Schottky contact layer is further in contact with each region disposed between said plurality of stripes.

2. A method according to claim 1 , wherein said threshold distance is eight microns.

3. A method according to claim 1 , wherein said threshold distance is twelve microns.

4. A method according to claim 1 , wherein said threshold distance is eighteen microns.

5. A method according to claim 1 , wherein said threshold distance ranges between eight microns and nineteen microns.

6. A method according to claim 1 , wherein said first depth is five microns.

7. A method according to claim 1 , wherein a thickness of said semiconductive body at a first stripe of said plurality of stripes is different from a thickness of said semiconductor body at a second stripe of said plurality of stripes.

8. A method according to claim 1 , wherein a doping concentration of said semiconductive body at a first stripe of said plurality of stripes is different from a doping concentration of said semiconductor body at a second stripe of said plurality of stripes.

9. A method according to claim 1 , wherein said plurality of stripes is doped with P + impurities and said semiconductive body is an epitaxial layer on N − doped silicon substrate.

10. A method according to claim 1 , said forming said plurality of stripes is performed at a temperature of about 1100 degrees Celsius for about 6 hours.

11. A method according to claim 1 , wherein said semiconductor device exhibits substantially similar reverse avalanche energy absorption characteristics as a Fast Recovery Epitaxial Diode having a diffusion well significantly deeper than said first depth.

12. A method for manufacturing a merged P-i-N Schottky structure, comprising:

forming a plurality of P+ doped diffusion stripes in N− doped silicon substrate, wherein said plurality of P+ doped diffusion stripes are spaced apart by a distance, wherein said distance increases absorption of a reverse avalanche energy; and

forming a first electrode which makes a Schottky contact with each surface of surfaces of said N-doped silicon substrate exposed between said P+ doped diffusion stripes.

13. The method of claim 12 , wherein a depth of each of said plurality of P+ doped diffusion stripes is approximately 5 microns.

14. The method of claim 12 , wherein said forming said plurality of P+ doped diffusion stripes comprising:

expitaxially growing said N− doped silicon substrate over an N+ doped silicon substrate;

depositing an oxide layer on said N− doped silicon substrate;

forming a plurality of windows via said oxide layer;

implanting dopants to said N− doped silicon substrate via said plurality of windows; and

removing portions of said oxide layer formed over said plurality of P+ doped diffusion stripes.

15. The method of claim 12 , wherein said forming said plurality of P+ doped diffusion stripes further comprises determining said distance to obtain a desired amount of said reverse avalanche energy.

16. The method of claim 12 , wherein said N− doped silicon substrate is 30 microns in thickness and is doped to have a resistivity of approximately 12 ohms/cm.

17. The method of claim 12 , wherein said N− doped silicon substrate is 30 microns in thickness and is doped to have a resistivity of approximately 11 ohms/cm.