Information processing unit, computer control method, and information storage medium
View Patent ↗An information processing unit, a computer control method, and an information storage device are provided to acquire performance information during data processing and realize efficient data processing by changing data processing details as appropriate based on the information. An information processing unit includes: a data processing part 70 that processes data, an event detecting part 72 that detects predetermined events in the processing of the data processing part 70 , a frequency information storage part 74 that stores frequency information the occurrence of the predetermined events detected by the event detecting part 72 , a restriction judging part 76 that judges whether or not the processing of the data processing part 70 have been restricted based on the frequency information stored in the frequency information storage part 74 , and a processing changing part 78 that changes details of the processing of the data processing part 70 when the restriction judging part 76 judges that the processing of the data processing part 70 have been restricted.
1. An information processing unit comprising:
data processing means for processing data, including a plurality of processors;
queue storing means included in each of the plurality of processors for storing a request queue of accessing a memory shared by the plurality of processors;
event detecting means for detecting a first event indicating that the request queue stored in the queue storing means included in a processor among the plurality of processors is full on the process by the data processing means and a second event indicating that the memory is accessed;
frequency information storing means for storing information on frequencies of the occurrence of the first event and the second event detected by the event detecting means in each predetermined time interval;
restriction judging means for judging that the process by the data processing means have been restricted due to data transfer between the processor and the memory when the second event has been occurring over a predetermined frequency during a period of the first event occurring over a predetermined frequency; and
processing changing means for compressing data to be stored in the memory when the restriction judging means judges that the process by the data processing means have been restricted due to data transfer between the processor and the memory.
2. The information processing unit according to claim 1 , wherein
the restriction judging means judges that the process by the data processing means have been restricted due to data transfer between the processor and the memory based on a frequency of the second event during a period of the first event occurring over a predetermined frequency.
3. The information processing unit according to claim 1 , further comprising:
means for decompressing data compressed by the processing changing means.
4. A computer control method comprising the steps of:
data processing for processing data by a plurality of processors;
queue storing for storing a request queue of accessing a memory shared by the plurality of processors in a queue storing means included in each of the plurality of processors;
event detecting for detecting a first event indicating that the request queue stored in the queue storing means included in a processor among the plurality of processors is full in the data processing step, and a second event indicating that the memory is accessed;
restriction judging for judging that the process by the data processing step have been restricted due to data transfer between the processor and the memory when the second event has been occurring over a predetermined frequency during a period of the first event occurring over a predetermined frequency; and
processing changing for compressing data to be stored in the memory when it is judged at the restriction judging step that the process by the data processing step have been restricted due to data transfer between the processor and the memory.
5. An information storage medium that stores programs for making a computer to function as:
data processing means for processing data, including a plurality of processors;
queue storing means included in each of the plurality of processors for storing a request queue of accessing a memory shared by the plurality of processors;
event detecting means for detecting a first event indicating that the request queue stored in the queue storing means included in a processor among the plurality of processors is full on the process by the data processing means and a second event indicating that the memory is accessed;
frequency information storing means for storing information on frequencies of the occurrence of the first event and the second event detected by the event detecting means in each predetermined time interval;
restriction judging means for judging that the process by the data processing means have been restricted due to data transfer between the processor and the memory when the second event has been occurring over a predetermined frequency during a period of the first event occurring over a predetermined frequency; and
processing changing means for compressing data to be stored in the memory when the restriction judging means judges that the process by the data processing means have been restricted due to data transfer between the processor and the memory.
6. The information processing unit according to claim 1 , wherein
the request queue is a request queue of transferring data between the processor and the memory.
7. An information processing unit comprising:
a plurality of processors;
DMA controllers included in each of the plurality of processors for storing a request queue of accessing a memory shared by the plurality of processors;
a buffer for storing information on frequencies of the occurrence of a first event indicating that a request queue stored in a DMA controller included in a processor among the plurality of processors is full on the process by the data processing means, and a second event indicating that the memory is accessed; wherein
at least one of the plurality of processors judges whether the process by the processors has been restricted due to data transfer between the processor and the memory when the second event has been occurring over a predetermined frequency during a period of the first event occurring over a predetermined frequency, and compresses data to be stored in the memory when the restriction is judged during the process by the processors to have been restricted due to data transfer between the processor and the memory.