Resistance random access memory devices and method of fabrication
View Patent ↗A method of fabricating a RRAM includes preparing a substrate and forming a bottom electrode ori the substrate. A PCMO layer is deposited on the bottom electrode using MOCVD or liquid MOCVD, followed by a post-annealing process. The deposited PCMO thin film has a crystallized PCMO structure or a nano-size and amorphous PCMO structure. A top electrode is formed on the PCMO layer.
1. A method of fabricating a RRAM, comprising:
preparing a substrate;
forming a bottom electrode on the substrate;
depositing a PCMO layer on the bottom electrode, wherein said depositing is taken from the group of deposition methods consisting of MOCVD and liquid MOCVD, and wherein the PCMO thin film has a crystallized PCMO structure or a nano-size and amorphous PCMO structure;
post-annealing the substrate, bottom electrode and PCMO layer; and
forming a top electrode on the PCMO layer.
2. The method of claim 1 which includes annealing the RRAM.
3. The method of claim 2 where said annealing depositing a PCMO layer includes depositing the PCMO layer at a deposition temperature of greater than 440° C. and wherein said annealing includes annealing at a temperature greater than 500° C.
4. The method of claim 1 wherein said depositing a PCMO layer having a crystalline PCMO structure includes depositing a PCMO layer having a grain size of between about 0.1 μm and 0.15 μm.
5. The method of claim 1 wherein said preparing a substrate includes preparing a silicon substrate having a layer of silicon oxide thereon, and which further includes depositing a layer of titanium on the silicon oxide before said depositing a bottom electrode; and wherein said depositing a bottom electrode and said depositing a top electrode include depositing top and bottom platinum electrodes.
6. A method of fabricating a RRAM, comprising:
preparing a substrate;
forming a bottom electrode on the substrate;
depositing a PCMO layer on the bottom electrode, wherein said depositing is taken from the group of deposition methods consisting of MOCVD and liquid MOCVD, depositing the PCMO layer at a deposition temperature of between about 300° C. to 440° C., and wherein the PCMO thin film has a nano-size and amorphous PCMO structure;
forming a top electrode on the PCMO layer; and
annealing the RRAM.
7. The method of claim 6 where said annealing includes annealing at a temperature greater than 450° C.
8. The method of claim 6 wherein said depositing a PCMO layer having a nano-size and amorphous PCMO structure includes depositing a PCMO layer having a grain size of less than 100 nm.
9. The method of claim 6 wherein said preparing a substrate includes preparing a silicon substrate having a layer of silicon oxide thereon, and which further includes depositing a layer of titanium on the silicon oxide before said depositing a bottom electrode; and wherein said depositing a bottom electrode and said depositing a top electrode include depositing top and bottom platinum electrodes.
10. A method of fabricating a RRAM, comprising:
preparing a silicon substrate;
forming a layer of silicon oxide on the silicon substrate;
depositing a layer of titanium on the silicon oxide;
forming a platinum bottom electrode on the substrate;
depositing a PCMO layer on the platinum bottom electrode, wherein said depositing is taken from the group of deposition methods consisting of MOCVD and liquid MOCVD, depositing the PCMO layer at a deposition temperature of between about 300° C. to 600° C., and wherein the PCMO thin film has a crystallized PCMO structure or a nano-size and amorphous PCMO structure;
forming a platinum top electrode on the PCMO layer; and
annealing the RRAM.
11. The method of claim 10 where said annealing includes annealing at a temperature greater than 500° C.
12. The method of claim 10 wherein said depositing a PCMO layer having a nano-size and amorphous PCMO structure includes depositing a PCMO layer having a grain size of less than 100 nm and a crystalline PCMO layer has a grain size of between about 0.1 μm and 0.15 μm.