IP Library Granted Patent US 7,424,593
Granted Patent B2
US 7,424,593 · App. 11/404,577 · Granted Sep 9, 2008

Increasing the memory performance of flash memory devices by writing sectors simultaneously to multiple flash memory devices

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Quick Facts
Patent No.
US 7,424,593
App. No.
11/404,577
Granted
Sep 9, 2008
Kind
B2
Abstract

In one embodiment of the present invention, a memory storage system for storing information organized in sectors within a nonvolatile memory bank is disclosed. The memory bank is defined by sector storage locations spanning across one or more rows of a nonvolatile memory device, each the sector including a user data portion and an overhead portion. The sectors being organized into blocks with each sector identified by a host provided logical block address (LBA). Each block is identified by a modified LBA derived from the host-provided LBA and said virtual PBA, said host-provided LBA being received by the storage device from the host for identifying a sector of information to be accessed, the actual PBA developed by said storage device for identifying a free location within said memory bank wherein said accessed sector is to be stored. The storage system includes a memory controller coupled to the host; and a nonvolatile memory bank coupled to the memory controller via a memory bus, the memory bank being included in a non-volatile semiconductor memory unit, the memory bank has storage blocks each of which includes a first row-portion located in said memory unit, and a corresponding second row-portion located in each of the memory unit, each of the memory row-portions provides storage space for two of said sectors, wherein the speed of performing write operations is increased by writing sector information to the memory unit simultaneously.

Claims (103)

1. A non-volatile memory system comprising:

memory control circuitry; and

a non-volatile memory unit coupled to the memory control circuitry and including one or more non-volatile memory devices organized into sectors, a sector including storage locations for a plurality of sectors of information, a sector of information being an even sector of information or an odd sector of information, even and odd sectors of information each including user data and overhead, the memory control circuitry for programming of user data of at least one even sector of information into a sector of a first non-volatile memory device and for programming of overhead of the at least one even sector of information into a sector of a second non-volatile memory device and for programming user data of at least one odd sector of information into the sector of the second non-volatile memory device and for programming the overhead of the at least one odd sector of information into the sector of the second non-volatile memory device,

wherein sectors of information are programmed into at least two non-volatile memory devices simultaneously.

2. A non-volatile memory system, as recited in claim 1 , wherein said non-volatile memory unit includes one or more flash memory chips.

3. A non-volatile memory system comprising:

memory control circuitry; and

a non-volatile memory unit coupled to the memory control circuitry and including one or more non-volatile memory devices organized into sectors, a sector including storage locations for a plurality of sectors of information, a sector of information being an even sector of information or an odd sector of information, even and odd sectors of information each including user data and overhead, the memory control circuitry for programming of user data of at least one first even sector of information into a sector of a first non-volatile memory device, for programming of user data of at least one second even sector of information into a sector of a second non-volatile memory device, and for programming of overhead of the at the least one first even sector of information and of the at least one second even sector of information into the sector of the second non-volatile memory device and for programming user data of at least one first odd sector of information into the sector of the second non-volatile memory device, for programming of user data of at least one second odd sector of information into the sector of the first non-volatile memory device, and for programming of overhead of the at least one first odd sector of information and of the at least one second odd sector of information into the sector of the second non-volatile memory device,

wherein the user data of the at least one first even sector of information and the user data of the at least one second even sector of information are programmed into the first and second non-volatile memory devices simultaneously and the user data of the at least one first odd sector of information and the user data of the at least one second odd sector of information are programmed into the first and second non-volatile memory devices simultaneously.

4. A non-volatile memory system, as recited in claim 3 , wherein said non-volatile memory unit includes one or more flash memory chips.

5. A non-volatile memory system comprising:

memory control circuitry; and

a non-volatile memory unit coupled to the memory control circuitry and including one or more non-volatile memory devices including storage locations for a plurality of sectors of information, a sector of information being an even sector of information or an odd sector of information, even and odd sectors of information each including user data and overhead, the memory control circuitry for programming of user data of at least one even sector of information into a first non-volatile memory device and for programming of overhead of the at least one even sector of information into a second non-volatile memory device and for programming user data of at least one odd sector of information into the second non-volatile memory device and for programming the overhead of the at least one odd sector of information into the second non-volatile memory device,

wherein sectors of information are programmed into at least two non-volatile memory devices simultaneously.

6. A non-volatile memory system, as recited in claim 5 , wherein said non-volatile memory unit is organized into sectors, a sector including storage locations for a plurality of sectors of information.

7. A non-volatile memory system, as recited in claim 5 , wherein said non-volatile memory unit includes one or more flash memory chips.

8. A non-volatile memory system comprising:

memory control circuitry; and

a non-volatile memory unit coupled to the memory control circuitry and including one or more non-volatile memory devices including storage locations for a plurality of sectors of information, a sector of information being an even sector of information or an odd sector of information, even and odd sectors of information each including user data and overhead, the memory control circuitry for programming of user data of at least one first even sector of information and at least one first odd sector of information into a first non-volatile memory device and for programming user data of at least one second even sector of information and at least one second odd sector of information into a second non-volatile memory device and for programming of overhead of the at least one first even sector of information, the at least one second even sector of information, the at least one first odd sector of information, and the at least one second odd sector of information into the second non-volatile memory device,

wherein the user data of the at least one first even sector of information and the user data of the at least one second even sector of information are programmed into the first and second non-volatile memory devices simultaneously and the user data of the at least one first odd sector of information and the user data of the at least one second odd sector of information are programmed into the first and second non-volatile memory devices simultaneously.

9. A non-volatile memory system, as recited in claim 8 , wherein said non-volatile memory unit is organized into sectors, a sector including storage locations for a plurality of sectors of information.

10. A non-volatile memory system, as recited in claim 8 , wherein said non-volatile memory unit includes one or more flash memory chips.

11. A non-volatile memory system comprising:

memory control circuitry; and

a non-volatile memory unit coupled to the memory control circuitry and organized into sectors, a sector including storage locations for a plurality of sectors of information, a sector of information being an even sector of information or an odd sector of information, even and odd sectors of information each including user data and overhead, the memory control circuitry for programming of user data of at least one even sector of information into a first sector and for programming of overhead of the at least one even sector of information into a second sector and for programming user data of the at least one odd sector of information into the second sector and for programming the overhead of the at least one odd sector of information into the second sector,

wherein at least two sectors of information are programmed simultaneously.

12. A non-volatile memory system, as recited in claim 11 , wherein said non-volatile memory unit includes one or more flash memory chips.

13. A non-volatile memory system comprising:

memory control circuitry; and

a non-volatile memory unit coupled to the memory control circuitry and organized into sectors, a sector including storage locations for a plurality of sectors of information, a sector of information being an even sector of information or an odd sector of information, even and odd sectors of information each including user, data and overhead, the memory control circuitry for programming of user data of at least one first even sector of information and of at least one first odd sector of information into a first sector and for programming user data of at least one second even sector of information and of at least one second odd sector of information into a second sector and for programming of overhead of the at the least one first even sector of information, the at least one second even sector of information, the at least one first odd sector of information and the at least one second odd sector of information into the second sector,

wherein the user data of the at the least one first even sector of information and the user data of the at least one second even sector of information are programmed simultaneously and the user data of the at the least one first odd sector of information and the user data of the at least one second odd sector of information are programmed simultaneously.

14. A non-volatile memory system, as recited in claim 13 , wherein said non-volatile memory unit includes one or more flash memory chips.

15. A method for programming a plurality of sectors of information into at least two non-volatile memory devices organized into sectors of a non-volatile memory unit, a sector of information being an even sector of information or an odd sector of information and even and odd sectors of information each including user data and overhead, each sector including storage locations for a plurality of sectors of information, the method comprising:

programming the user data of at least one even sector of information into a sector of a first non-volatile memory device;

programming the user data of at least one odd sector of information into a sector of a second non-volatile memory device;

programming overhead of the at least one even sector of information into the sector of the second non-volatile memory device; and

programming overhead of the at least one odd sector of information into the sector of the second non-volatile memory device,

wherein sectors of information are programmed into the at least two non-volatile memory devices simultaneously.

16. A method for programming, as recited in claim 15 , wherein said non-volatile memory unit including one or more flash memory chips.

17. A method for programming a plurality of sectors of information into at least two nonvolatile memory devices organized into sectors of a non-volatile memory unit, a sector of information being an even sector of information or an odd sector of information and even and odd sectors of information each including user data and overhead, each sector including storage locations for a plurality of sectors of information, the method comprising:

programming the user data of at least one first even sector of information into a sector of a first non-volatile memory device;

programming the user data of at least one second even sector of information into a sector of a second non-volatile memory device;

programming the user data of at least one first odd sector of information into the sector of the second non-volatile memory device;

programming the user data of at least one second odd sector of information into the sector of the first non-volatile memory device;

programming overhead of the at least one first even sector of information and of the at least one second even sector of information into the sector of the second non-volatile memory device; and

programming overhead of the at least one first odd sector of information and of the at least one second odd sector of information into the sector of the second non-volatile memory device,

wherein the user data of the at least one first even sector of information and the user data of the at least one second even sector of information are programmed into the first and second non-volatile memory devices simultaneously and the user data of the at least one first odd sector of information and the user data of the at least one second odd sector of information are programmed into the first and second non-volatile memory devices simultaneously.

18. A method for programming, as recited in claim 17 , wherein said non-volatile memory unit including one or more flash memory chips.

19. A method for programming a plurality of sectors of information into at least two non-volatile memory devices, a sector of information being an even sector of information or an odd sector of information and even and odd sectors of information each including user data and overhead, the method comprising:

programming of user data of at least one even sector of information into a first non-volatile memory device;

programming of overhead of the at least one even sector of information into a second non-volatile memory device;

programming user data of at least one odd sector of information into the second non-volatile memory device; and

programming the overhead of the at least one odd sector of information into the second non-volatile memory device,

wherein at least two sectors of information are programmed into at least two non-volatile memory devices simultaneously.

20. A method for programming, as recited in claim 19 , wherein said non-volatile memory unit including one or more flash memory chips.

21. A method for programming, as recited in claim 19 , wherein said non-volatile memory unit being organized into sectors, a sector including storage locations for a plurality of sectors of information.

22. A method for programming a plurality of sectors of information into at least two non-volatile memory devices, a sector of information being an even sector of information or an odd sector of information and even and odd sectors of information each including user data and overhead, the method comprising:

programming of user data of at least one first even sector of information and at least one first odd sector of information into a first non-volatile memory device;

programming user data of at least one second even sector of information and at least one second odd sector of information into the second non-volatile memory device; and

programming of overhead of the at least one first even sector of information, the at least one second even sector of information, the at least one first odd sector of information, and the at least one second odd sector of information into the second non-volatile memory device;

wherein the user data of the at least one first even sector of information and the user data of the at least one second even sector of information are programmed into the first and second non-volatile memory devices simultaneously and the user data of the at least one first odd sector of information and the user data of the at least one second odd sector of information are programmed into the first and second non-volatile memory devices simultaneously.

23. A method for programming, as recited in claim 22 , wherein said non-volatile memory unit including one or more flash memory chips.

24. A method for programming, as recited in claim 22 , wherein said non-volatile memory unit being organized into sectors, a sector including storage locations for a plurality of sectors of information.

25. A method for programming a plurality of sectors of information in a non-volatile memory unit organized into sectors, a sector including storage locations for a plurality of sectors of information, a sector of information being an even sector of information or an odd sector of information, even and odd sectors of information each including user data and overhead, the method comprising:

programming of user data of at least one even sector of information into a first sector;

programming of overhead of the at least one even sector of information into a second sector;

programming user data of the at least one odd sector of information into the second sector; and

programming the overhead of the at least one odd sector of information into the second sector,

wherein at least two sectors of information are programmed simultaneously.

26. A method for programming, as recited in claim 25 , wherein said non-volatile memory unit including one or more flash memory chips.

27. A method for programming a plurality of sectors of information in a non-volatile memory unit organized into sectors, a sector including storage locations for a plurality of sectors of information, a sector of information being an even sector of information or an odd sector of information, even and odd sectors of information each including user data and overhead, the method comprising:

programming of user data of at least one first even sector of information and of at least one first odd sector of information into a first sector;

programming user data of at least one second even sector of information and of at least one second odd sector of information into a second sector; and

programming of overhead of the at the least one first even sector of information, the at least one second even sector of information, the at least one first odd sector of information, and the at least one second odd sector of information into the second sector;

wherein the user data of the at the least one first even sector of information and the user data of the at least one second even sector of information are programmed simultaneously and the user data of the at the least one first odd sector of information and the user data of the at least one second odd sector of information are programmed simultaneously.

28. A method for writing programming, as recited in claim 27 , wherein said non-volatile memory unit including one or more flash memory chips.

29. A non-volatile memory system comprising:

memory control circuitry; and

a non-volatile memory unit coupled to the memory control circuitry including a plurality of rows, each row including one or more row-portions, each row-portion including storage locations providing storage space for a plurality of sectors of information, a sector of information being an even sector of information or an odd sector of information, even and odd sectors of information each including user data and overhead, the memory control circuitry for programming of user data of at least one even sector of information into a first row-portion and for programming of overhead of the at least one even sector of information into a second row-portion and for programming user data of at least one odd sector of information into the second row-portion and for programming the overhead of the at least one odd sector of information into the second row-portion,

wherein at least two sectors of information are programmed to a row simultaneously.

30. A non-volatile memory system, as recited in claim 29 , wherein said non-volatile memory unit includes one or more flash memory chips.

31. A non-volatile memory system, as recited in claim 29 , wherein said non-volatile memory unit being organized into sectors, a sector including storage locations for a plurality of sectors of information.

32. A non-volatile memory system comprising:

memory control circuitry; and

a non-volatile memory unit coupled to the memory control circuitry including a plurality of rows, each row including one or more row-portions, each row-portion including storage locations for a plurality of sectors of information, a sector of information being an even sector of information or an odd sector of information, even and odd sectors of information each including user data and overhead, the memory control circuitry for programming of user data of at least one first even sector of information into a first row-portion, for programming of user data of at least one first odd sector of information into the first row-portion, for programming user data of at least one second even sector of information into a second row-portion, for programming of user data of at least one second odd sector of information into the second row-portion, and for programming of overhead of the at least one first even sector of information, the at least one second even sector of information, the at least one first odd sector of information, and, the at least one second odd sector of information into the second row-portion,

wherein the user data of the at least one first even sector of information and the user data of the at least one second even sector of information are programmed into the first and second row portions simultaneously, and the user data of the at least one first odd sector of information and the user data of the at least one second odd sector of information are programmed into the first and second row portions simultaneously.

33. A non-volatile memory system, as recited in claim 32 , wherein said non-volatile memory unit includes one or more flash memory chips.

34. A non-volatile memory system, as recited in claim 32 , wherein said non-volatile memory unit being organized into sectors, a sector including storage locations for a plurality of sectors of information.

35. A method for programming a plurality of sectors of information into a non-volatile memory unit including a plurality of rows, each row including one or more row-portions, each row-portion including storage locations providing storage space for a plurality of sectors of information, a sector of information being an even sector of information or an odd sector of information, even and odd sectors of information each including user data and overhead, the method comprising:

programming of user data of at least one even sector of information into a first row-portion;

programming of overhead of the at least one even sector of information into a second row-portion;

programming user data of at least one odd sector of information into the second row-portion; and

programming the overhead of the at least one odd sector of information into the second row-portion,

wherein at least two sectors of information are programmed to a row simultaneously.

36. A method for programming, as recited in claim 35 , wherein said non-volatile memory unit including one or more flash memory chips.

37. A method for programming, as recited in claim 35 , wherein said non-volatile memory unit being organized into sectors, a sector including storage locations for a plurality of sectors of information.

38. A method for programming a plurality of sectors of information into a non-volatile memory unit including a plurality of rows, each row including one or more row-portions, each row-portion including storage locations providing storage space for a plurality of sectors of information, a sector of information being an even sector of information or an odd sector of information, even and odd sectors of information each including user data and overhead, the method comprising:

programming of user data of at least one first even sector of information and of at least one first odd sector of information into a first row-portion;

programming user data of at least one second even sector of information and of at least one second odd sector of information into a second row-portion; and

programming of overhead of the at least one first even sector of information, the at least one second even sector of information, the at least one first odd sector of information, and the at least one second odd sector of information into the second row-portion;

wherein the user data of the at least one first even sector of information and the user data of the at least one second even sector of information are programmed into the first and second row portions simultaneously, and the user data of the at least one first odd sector of information and the user data of the at least one second odd sector of information are programmed into the first and second row portions simultaneously.

39. A method for programming, as recited in claim 38 , wherein said non-volatile memory unit including one or more flash memory chips.

40. A method for programming, as recited in claim 38 , wherein said non-volatile memory unit being organized into sectors, a sector including storage locations for a plurality of sectors of information.

Assignments (8)
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
MERGER Recorded Jun 11, 2013
From: LEXAR MEDIA, INC.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 030588/0368 →
MERGER Recorded Mar 25, 2011
From: LEXAR MEDIA, INC.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 026024/0131 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 13, 2006
From: ESTAKHRI, PETRO; IMAN, BERHANU
To: LEXAR MEDIA, INC.
Reel/Frame 017774/0909 →