IP Library Patent Application 11404899
Patent Application
App. No. 11/404,899

Method of fabricating nonvolatile semiconductor memory devices with uniform sidewall gate length

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Patent No.
US None
App. No.
11/404,899
Abstract

After forming a first dielectric film on the main surface of a semiconductor substrate, a first conductive film is formed on the first dielectric film, and then, the surface of the first conductive film is planarized by a CMP method. Subsequently, the first conductive film and the first dielectric film are etched, thereby forming a select gate having a first gate electrode and a first gate dielectric film. Subsequently, after forming a second dielectric film on the sidewall of the first gate electrode and the main surface, a second conductive film is formed on the second dielectric film, and the second conductive film is etched, thereby forming a memory gate having a second gate electrode and a second gate dielectric film.

Claims (62)

1 . A fabricating method of a nonvolatile semiconductor memory device, comprising:

a first dielectric film formed on a main surface of a semiconductor substrate;

a first gate electrode made of a first conductive film formed on said first dielectric film;

a second dielectric film formed on a sidewall of said first gate electrode and said main surface;

a second gate electrode made of a second conductive film formed on said second dielectric film; and

doped regions to be source and drain formed in said semiconductor substrate below said first gate electrode and said second gate electrode,

said fabricating method comprising the steps of:

(a) forming said first dielectric film on said main surface and then forming said first conductive film on said first dielectric film;

(b) planarizing a surface of said first conductive film by a CMP method;

(c) forming said first gate electrode by patterning said first conductive film;

(d) forming said second dielectric film on the sidewall of said first gate electrode and said main surface and forming said second conductive film on said second dielectric film; and

(e) etching back said second conductive film to form said second gate electrode.

2 . The fabricating method of a nonvolatile semiconductor memory device according to claim 1 ,

wherein, in said step (d), said second conductive film is formed of amorphous silicon.

3 . The fabricating method of a nonvolatile semiconductor memory device according to claim 1 ,

wherein, in said step (d), said second conductive film is formed of amorphous silicon doped with a dopant.

4 . The fabricating method of a nonvolatile semiconductor memory device according to claim 1 ,

wherein, in said step (a), said first conductive film is formed of polysilicon not doped with any dopant.

5 . The fabricating method of a nonvolatile semiconductor memory device according to claim 1 ,

wherein said second dielectric film is composed of a first oxide film, a trap dielectric film, and a second oxide film formed on the sidewall of said first gate electrode and said main surface, and

said step (d) includes the steps of:

(d1) forming said first oxide film on the sidewall of said first gate electrode and said main surface;

(d2) forming said trap dielectric film on said first oxide film; and

(d3) forming said second oxide film on said trap dielectric film.

6 . The fabricating method of a nonvolatile semiconductor memory device according to claim 1 ,

wherein, in said step (c), said first gate electrode is formed so that a gate length of said first gate electrode is set to 120 nm or more.

7 . The fabricating method of a nonvolatile semiconductor memory device according to claim 1 ,

wherein, in said step (c), patterning is performed by a photolithography method using KrF light source.

8 . The fabricating method of a nonvolatile semiconductor memory device according to claim 1 , further comprising the step of; (f) forming said doped regions by an ion implantation method with using said second gate electrode as a mask.

9 . A fabricating method of a nonvolatile semiconductor memory device, comprising:

a first dielectric film formed on a main surface of a semiconductor substrate;

a first gate electrode composed of a first conductive film formed on said first dielectric film;

a cap dielectric film formed on said first gate electrode;

a second dielectric film formed on a sidewall of said first gate electrode and said main surface;

a second gate electrode composed of a second conductive film formed on said second dielectric film; and

doped regions to be source and drain formed in said semiconductor substrate below said first gate electrode and said second gate electrode,

said fabricating method comprising the steps of:

(a) forming said first dielectric film on said main surface and then forming said first conductive film on said first dielectric film;

(b) forming said cap dielectric film on said first conductive film;

(c) planarizing a surface of said cap dielectric film by a CMP method;

(d) forming said first gate electrode by patterning said cap dielectric film and said first conductive film;

(e) forming said second dielectric film on the sidewall of said first gate electrode and said main surface and forming said second conductive film on said second dielectric film; and

(f) etching back said second conductive film to form said second gate electrode.

10 . The fabricating method of a nonvolatile semiconductor memory device according to claim 9 ,

wherein, in said step (e), said second conductive film is formed of amorphous silicon.

11 . The fabricating method of a nonvolatile semiconductor memory device according to claim 9 ,

wherein, in said step (e), said second conductive film is formed of amorphous silicon doped with a dopant.

12 . The fabricating method of a nonvolatile semiconductor memory device according to claim 9 ,

wherein, in said step (a), said first conductive film is formed of polysilicon not doped with any dopant.

13 . The fabricating method of a nonvolatile semiconductor memory device according to claim 9 ,

wherein said second dielectric film is composed of a first oxide film, a trap dielectric film, and a second oxide film formed on the sidewall of said first gate electrode and said main surface, and

said step (e) includes the steps of:

(e1) forming said first oxide film on the sidewall of said first gate electrode and said main surface;

(e2) forming said trap dielectric film on said first oxide film; and

(e3) forming said second oxide film on said trap dielectric film.

14 . The fabricating method of a nonvolatile semiconductor memory device according to claim 9 ,

wherein, in said step (d), said first gate electrode is formed so that a gate length of said first gate electrode is set to 120 nm or more.

15 . The fabricating method of a nonvolatile semiconductor memory device according to claim 9 ,

wherein, in said step (d), patterning is performed by a photolithography method using KrF light source.

16 . The fabricating method of a nonvolatile semiconductor memory device according to claim 9 ,

wherein, in said step (d), said cap dielectric film is formed of silicon oxide.

17 . The fabricating method of a nonvolatile semiconductor memory device according to claim 9 , further comprising the step of: (g) forming said doped regions by an ion implantation method with using said second gate electrode as a mask.

Assignments (2)
MERGER AND CHANGE OF NAME Recorded Sep 9, 2010
From: RENESAS TECHNOLOGY CORP.
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 024953/0672 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2006
From: YASUI, KAN; KIMURA, SHINICHIRO; HISAMOTO, DIGH; ISHIMARU, TETSUYA
To: RENESAS TECHNOLOGY CORP.
Reel/Frame 017948/0232 →