IP Library Granted Patent US 7,615,976
Granted Patent B2
US 7,615,976 · App. 11/407,537 · Granted Nov 10, 2009

Switching circuit of power converter having voltage-clipping device to improve efficiency

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,615,976
App. No.
11/407,537
Granted
Nov 10, 2009
Kind
B2
Abstract

A switching circuit for power converters is presented. It includes a voltage-clipping device, a resistive device, a first transistor and a second transistor. The voltage-clipping device is coupled to an input voltage. The first transistor is connected in series with the voltage-clipping device for switching the input voltage. The second transistor is coupled to control the first transistor and the voltage-clipping device in response to a control signal. The resistive device provides a bias voltage to turn on the voltage-clipping device and the first transistor when the second transistor is turned off. Once the second transistor is turned on, the first transistor is turned off and the voltage-clipping device is negatively biased. The voltage-clipping device is developed to clamp a maximum voltage for the first transistor.

Claims (30)

1. A switching circuit for power converters, comprising:

a voltage-clipping device, having an input terminal directly coupled to an input voltage, and a control terminal directly coupled to a gate terminal of the voltage-clipping device;

a first transistor, having a drain terminal directly coupled to an output terminal of said voltage-clipping device, wherein a source terminal of said first transistor provides a supply voltage to a control circuit of the power converter;

a second transistor, having a drain terminal directly coupled to a gate terminal of said first transistor and a control terminal of said voltage-clipping device; a gate terminal of said second transistor receives a control signal; and

a resistive device, connected from said control terminal of said voltage-clipping device to an output terminal of said voltage-clipping device, wherein said resistive device provides a bias voltage to turn on said first transistor and said voltage-clipping device when said second transistor is turned off; said control signal turns on said second transistor for switching off said first transistor and providing a negative bias for said voltage-clipping device, wherein said voltage-clipping device clamps a maximum voltage for said first transistor.

2. The switching circuit as claimed in claim 1 , said voltage-clipping device comprising:

a P-type substrate;

a first diffusion region and a second diffusion region, having N-type ions to form an N-type well in said P-type substrate;

an input diffusion region, containing N+-type ions, forming an input region in said first diffusion region;

an output diffusion region, containing N+-type ions, forming an output region in said second diffusion region;

a P-type field block, formed in said N-type well; wherein said P-type field block is disposed adjacent to said input region for generating junction fields;

an isolated P-type well, formed in said N-type well, wherein said isolated P-type well is formed in said second diffusion region;

a control diffusion region, containing P+-type ions, forming a control region in said isolated P-type well; and

a channel, formed between said input region and said output region; wherein said control region controls a width of said channel to control a current flow in said channel.

3. The switching circuit as claimed in claim 1 , wherein said resistive device is a resistor.

4. The switching circuit as claimed in claim 1 , wherein said resistive device is formed with a plurality of transistors.

5. A switching circuit, comprising:

a voltage-clipping device, receiving an input voltage, wherein the voltage-clipping device has a control terminal directly coupled to a gate terminal of the voltage-clipping device;

a first transistor, directly connected in series with said voltage-clipping device for receiving and switching said input voltage outputted from the voltage-clipping device;

a resistive device, coupled to said voltage-clipping device and said first transistor for providing a bias voltage to turn on said voltage-clipping device and said first transistor; and

a second transistor, turning off said first transistor and providing a negative bias to said voltage-clipping device, wherein said voltage-clipping device clamps a maximum voltage for said first transistor, and said second transistor is controlled by a control signal.

6. The switching circuit as claimed in claim 5 , said voltage-clipping device comprising:

a P-type substrate;

a diffusion region, having N-type ions to form an N-type well in said P-type substrate;

an input diffusion region, containing N+-type ions, forming an input region in said N-type well;

an output diffusion region, having N+-type ions, forming an output region in said N-type well;

a P-type field block, formed in said N-type well, wherein said P-type field block is disposed adjacent to said input region for generating junction fields;

an isolated P-type well, formed in said N-type well; wherein said isolated P-type well is disposed adjacent to said output region;

a control diffusion region, containing P+-type ions, forming a control region in said isolated P-type well; and

a conduction channel, formed between said input region and said output region; wherein said control region controls a width of said conduction channel to control a current flow in said conduction channel.

Assignments (5)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT RECORDED AT REEL 046410, FRAME 0933 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064072/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 22, 2018
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 046410/0933 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 25, 2017
From: FAIRCHILD (TAIWAN) CORPORATION (FORMERLY SYSTEM GENERAL CORPORATION)
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 042328/0318 →
CHANGE OF NAME Recorded Jun 8, 2016
From: SYSTEM GENERAL CORP.
To: FAIRCHILD (TAIWAN) CORPORATION
Reel/Frame 038906/0030 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 19, 2006
From: HUANG, CHIH-FENG; CHIANG, CHIU-CHIH; WU, YOU-KUO; HUANG, WEI-HSUAN; YANG, TA-YUNG
To: SYSTEM GENERAL CORP.
Reel/Frame 017810/0893 →