IP Library Granted Patent US 7,705,900
Granted Patent B2
US 7,705,900 · App. 11/408,640 · Granted Apr 27, 2010

CMOS image sensor pixel with selectable binning and conversion gain

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,705,900
App. No.
11/408,640
Granted
Apr 27, 2010
Kind
B2
Abstract

An image sensor includes a plurality of pixels, at least two pixels each having a photodetector; a charge-to-voltage conversion region; an input to an amplifier; and a switch for selectively connecting the charge-to-voltage conversion regions.

Claims (52)

1. An image sensor comprising:

a plurality of pixels, including at least two pixels each comprising:

(a) a photodetector for collecting charge;

(b) a floating diffusion region associated with the photodetector;

(c) a charge transfer gate for transferring charge from the photodetector to the floating diffusion region; and

(d) an amplifier connected to the floating diffusion region; and

at least one switch connected to the floating diffusion regions in at least two pixels for selectively connecting together only the floating diffusion regions in the at least two pixels to combine the charge on the connected floating diffusion regions.

2. The image sensor as in claim 1 , wherein each floating diffusion region is integrally formed as a portion of the photodetector.

3. The image sensor as in claim 2 , wherein the photodetector is a photodiode.

4. The image sensor as in claim 2 , wherein the plurality of pixels are arranged in rows and columns and the switch selectively connects floating diffusion regions of row adjacent pixels.

5. The image sensor as in claim 2 , wherein the plurality of pixels are arranged in rows and columns and the switch selectively connects floating diffusion regions of column adjacent pixels.

6. The image sensor as in claim 2 , wherein the plurality of pixels are arranged in rows and columns and the switch selectively connects floating diffusion regions of row and column adjacent pixels.

7. The image sensor as in claim 2 further comprising a color filter array spanning the plurality of pixels and the switch selectively connects floating diffusion regions of adjacent pixels covered by the same color of the color filter array.

8. The image sensor as in claim 1 , wherein the switch is a transistor.

9. The image sensor as in claim 8 , wherein the transistor is a NMOS transistor.

10. The image sensor as in claim 1 , wherein the plurality of pixels are arranged in rows and columns and the switch selectively connects floating diffusion regions of row adjacent pixels.

11. The image sensor as in claim 1 , wherein the plurality of pixels are arranged in rows and columns and the switch selectively connects floating diffusion regions of column adjacent pixels.

12. The image sensor as in claim 1 , wherein the plurality of pixels are arranged in rows and columns and the switch selectively connects floating diffusion regions of row and column adjacent pixels.

13. The image sensor as in claim 1 further comprising a color filter array spanning the plurality of pixels and the switch selectively connects floating diffusion regions of adjacent pixels covered by the same color of the color filter array.

14. The image sensor as in claim 1 , wherein the switch functions as either all or any combination of providing a desired capacitance for the floating diffusion regions or providing a means of combining charge from adjacent photodetectors.

15. The image sensor as in claim 1 , wherein the switch functions to provide a desired capacitance for the connected floating diffusion regions.

16. The image sensor as in claim 1 , wherein the switch functions to provide a means of combining charge from adjacent photodetectors.

17. A camera comprising:

an image sensor comprising:

a plurality of pixels, including at least two pixels each comprising:

(a) a photodetector for collecting charge;

(b) a floating diffusion region associated with the photodetector;

(c) a charge transfer gate for transferring charge from the photodetector to the floating diffusion region; and

(d) an amplifier connected to the floating diffusion region; and

at least one switch connected to the floating diffusion regions in at least two pixels for selectively connecting together only the floating diffusion regions in the at least two pixels to combine the charge on the connected floating diffusion regions.

18. The camera as in claim 17 , wherein each charge-to-voltage conversion region is integrally formed as a portion of the photodetector.

19. The camera as in claim 18 , wherein the photodetector is a photodiode.

20. The camera as in claim 18 , wherein the plurality of pixels are arranged in rows and columns and the switch selectively connects floating diffusion regions of row adjacent pixels.

21. The camera as in claim 18 , wherein the plurality of pixels are arranged in rows and columns and the switch selectively connects floating diffusion regions of column adjacent pixels.

22. The camera as in claim 18 , wherein the plurality of pixels are arranged in rows and columns and the switch selectively connects floating diffusion regions of row and column adjacent pixels.

23. The camera as in claim 18 further comprising a color filter array spanning the plurality of pixels and the switch selectively connects floating diffusion regions of adjacent pixels covered by the same color of the color filter array.

24. The camera as in claim 17 , wherein the switch is a transistor.

25. The camera as in claim 24 wherein the transistor is an NMOS transistor.

26. The camera as in claim 17 , wherein the plurality of pixels are arranged in rows and columns and the switch selectively connects floating diffusion regions of row adjacent pixels.

27. The camera as in claim 17 , wherein the plurality of pixels are arranged in rows and columns and the switch selectively connects floating diffusion regions of column adjacent pixels.

28. The camera as in claim 17 , wherein the plurality of pixels are arranged in rows and columns and the switch selectively connects floating diffusion regions of row and column adjacent pixels.

29. The camera as in claim 17 further comprising a color filter array spanning the plurality of pixels and the switch selectively connects floating diffusion regions of adjacent pixels covered by the same color of the color filter array.

30. The camera as in claim 17 , wherein the switch functions as either all or any combination of providing a desired capacitance for the floating diffusion regions or providing a means of combining charge from adjacent photodetectors.

31. The camera as in claim 17 , wherein the switch functions to provide a desired capacitance for the connected floating diffusion regions.

32. The camera as in claim 17 , wherein the switch functions to provide a means of combining charge from adjacent photodetectors.

33. A method for operating an image sensor comprising a plurality of pixels with at least two pixels each including a photodetector for collecting charge, a floating diffusion region associated with the photodetector; and a charge transfer gate for transferring charge from the photodetector to the floating diffusion region, and at least one switch connected to the floating diffusion regions in at least two pixels for selectively connecting together only the floating diffusion regions in the at least two pixels, the method comprising:

activating at least one switch to selectively connect together multiple floating diffusion regions to combine the charge on the multiple floating diffusion regions;

resetting the multiple floating diffusion regions to a predetermined voltage level;

sampling a reset voltage on the connected multiple charge to voltage conversion regions;

enabling at least one transfer gate to transfer charge from at least one photodetector to the connected multiple floating diffusion regions;

disabling the at least one transfer gate; and

sampling a signal voltage on the multiple floating diffusion regions.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 5, 2011
From: EASTMAN KODAK COMPANY
To: OMNIVISION TECHNOLOGIES, INC.
Reel/Frame 026227/0213 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 21, 2006
From: GUIDASH, R. MICHAEL
To: EASTMAN KODAK COMPANY
Reel/Frame 017808/0932 →