IP Library Granted Patent US 7,525,369
Granted Patent B2
US 7,525,369 · App. 11/411,918 · Granted Apr 28, 2009

Semiconductor circuit apparatus with voltage boost

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Quick Facts
Patent No.
US 7,525,369
App. No.
11/411,918
Granted
Apr 28, 2009
Kind
B2
Abstract

A semiconductor circuit apparatus includes a booster which is connected to a single power supply and outputs a power supply voltage of the power supply or a voltage different from the power supply voltage, and a boost controller which controls whether to output the power supply voltage of the power supply or the voltage different from the power supply voltage.

Claims (28)

1. A semiconductor circuit apparatus, comprising:

a voltage converter connected to a single power supply, for outputting one selected from a power supply voltage of the power supply and a converted voltage converted from the power supply voltage;

a voltage conversion controller for controlling whether to output the power supply voltage or the converted voltage from the voltage converter;

a signal output section connected to the voltage converter, for selecting and outputting a signal output from the voltage converter and a reference voltage in accordance with an input signal; and

a step-down section for stepping down a voltage output from the voltage converter, wherein whether to perform voltage step-down operation in the step-down section is controlled in accordance with a reduction/non-reduction selection signal,

wherein:

the voltage converter generates the converted voltage by using a reference voltage and the power supply voltage that are input alternatively,

the voltage conversion controller controls the voltage converter to output the power supply voltage by supplying a fixed voltage to the voltage converter, and

when outputting the converted voltage, the voltage converter stores a voltage while the signal output section outputs the reference voltage and supplies the converted voltage to the signal output section while the signal output section outputs the converted voltage.

2. The semiconductor circuit apparatus according to claim 1 , wherein the voltage converter includes a capacitor for accumulating a charge corresponding to a difference between the power supply voltage and a voltage different from the power supply voltage.

3. The semiconductor circuit apparatus according to claim 1 , further comprising:

a signal inverter for inverting the input signal and outputting the reference voltage and the power supply voltage alternatively to the voltage converter,

wherein the voltage converter generates the converted voltage by using the reference voltage and the power supply voltage that are input alternatively.

4. The semiconductor circuit apparatus according to claim 1 , wherein the voltage conversion controller controls the voltage converter in accordance with a boost/non-boost selection signal input through an external terminal.

5. The semiconductor circuit apparatus according to claim 1 , further comprising:

a storage medium for storing an input boost/non-boost selection signal,

wherein the voltage conversion controller controls the voltage converter in accordance with the boost/non-boost selection signal.

6. The semiconductor circuit apparatus according to claim 1 , further comprising:

a comparator for comparing an input voltage with a signal output from the voltage converter or the power supply voltage,

wherein a boost/non-boost selection signal is generated based on a result of the comparison and supplied to the voltage converter controller, and

the voltage conversion controller controls the voltage converter in accordance with the boost/non-boost selection signal.

7. A semiconductor circuit apparatus, comprising:

an input signal inverter, comprising a first PMOS transistor serially interconnected to a first NMOS transistor, receiving an input signal at gates of said first PMOS and NMOS transistors and inverting said input signal as an output thereof;

a boost controller, comprising a second PMOS transistor and a second NMOS transistor, receiving a boost control signal at gates of said second PMOS and NMOS transistors, a drain of said second PMOS transistor being connected to a source of said first PMOS transistor and a drain of said second NMOS transistor being connected to the output of said input signal inverter;

a voltage converter, comprising a third PMOS transistor serially connected to a capacitor, a source of said third PMOS connected to a power supply, a gate of said third PMOS transistor and one electrode of said capacitor being connected to the output of the input signal inverter; and

a signal output section receiving said input signal as an input control signal, said signal output section connected to said voltage converter such that said output section provides an output signal according to said input signal and said boost control signal.

8. The semiconductor circuit apparatus of claim 7 , further comprising:

a step-down controller, receiving a step-down control signal, connected to said signal output section such that said output section provides said output signal according to said input signal, said boost control signal, and said step-down control signal.

Assignments (2)
CHANGE OF NAME Recorded Nov 4, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025311/0833 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 27, 2006
From: KOYAMA, TETSUHIRO; MATSUMOTO, TETSUYA
To: NEC ELECTRONICS CORPORATION
Reel/Frame 017810/0755 →