IP Library Granted Patent US 7,280,053
Granted Patent B2
US 7,280,053 · App. 11/414,309 · Granted Oct 9, 2007

Encoder, decoder, and data transfer system

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Quick Facts
Patent No.
US 7,280,053
App. No.
11/414,309
Granted
Oct 9, 2007
Kind
B2
Abstract

An encoder suppresses effectively the high-frequency components of data to be transmitted by decreasing the changing points of serial data, thereby suppressing EMI. A changing-point counter counts changing points of n-bit data (n: a positive integer) to generate a counting result, where values of adjoining bits change at each of the changing points. The changing-point counter outputting a discrimination bit which is true when the counting result exceeds a predetermined value. A code converter converts the n-bit data in such a way that bits of the n-bit data located at predetermined positions are inverted when the discrimination bit is true. A parallel-to-serial converter converts (n+1)-bit data to a (n+1)-bit serial code, the (n+1)-bit data being generated by adding the discrimination bit to an output of the code converter.

Claims (16)

1. A decoder comprising:

a serial-to-parallel converter for converting an (n+1)-bit serial code generated by an encoder to a (n+1)-bit parallel data;

the encoder including,

a changing-point counter for counting changing points of n-bit data (n: a positive integer) to generate a counting result, where values of adjoining bits change at each of the changing points,

the changing-point counter outputting a discrimination bit which has a first valve when the counting result exceeds a predetermined value,

a code converter for converting the n-bit data in such a way that bits of the n-bit data located at predetermined positions are inverted when the discrimination bit has the first valve,

a parallel-to-serial converter for converting (n+1)-bit data to a (n+1)-bit serial code, the (n+1)-bit data being generated by adding the discrimination bit to an output of the code converter; and

a code deconverter for deconverting the (n+1)-bit parallel data in such a way that some of the n-bits of the (n+1)-bit parallel data located at predetermined positions excluding the discrimination bit are inverted when the discrimination bit is true.

2. A decoder comprising:

a code deconverter for inverting an (n+1)-bit serial code generated by an encoder in such a way that some of the n-bits of the (n+1)-bit serial code located at predetermined positions excluding the discrimination bit are inverted when the discrimination bit is true, thereby outputting a n-bit serial data,

the encoder including,

a changing-point counter for counting changing points of n-bit data(n: a positive integer) to generate a counting result, where values of adjoining bits change at each of the changing points,

the changing-point counter outputting a discrimination bit which has a first valve when the counting result exceeds a predetermined value,

a code converter for converting the n-bit data in such a way that bits of the n-bit data located at predetermined positions are inverted when the discrimination bit has the first valve,

a parallel-to-serial converter for converting (n+1)-bit data to a (n+1)-bit serial code, the (n+1)-bit data being generated by adding the discrimination bit to an output of the code converter; and

a serial-toparallel converter for converting the n-bit serial data to a n-bit parallel data.

Assignments (1)
CHANGE OF NAME Recorded Nov 4, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025311/0833 →