Light emitting diode package with direct leadframe heat dissipation
View Patent ↗A packaged circuit and method for packaging an integrated circuit are disclosed. The packaged circuit has a lead frame, an integrated circuit chip, and an encapsulating layer. The lead frame has first and second sections, the first section including a lateral portion, a chip mounting area and a first extension. The integrated circuit chip is mounted in the chip mounting area and is in thermal contact with the chip mounting area. The encapsulating layer has top, bottom, and first and second side surfaces. The first extension is bent to provide a first heat path from the chip mounting area to the bottom surface. The heat path connects the heat chip mounting area to the bottom surface without passing through the first and second side surfaces and provides a heat path that has less thermal resistance than the heat path through either the lateral portion or the second section.
1. A packaged circuit comprising:
a leadframe having a first section and a second section, said first section comprising a lateral portion, a chip mounting area and a first extension;
an integrated circuit chip mounted in said chip mounting area and in thermal contact with said chip mounting area;
an encapsulating layer having a top surface, a bottom surface, a first side surface, a second side surface, and an interior region positioned between said top surface and said bottom surface, wherein, said first extension is bent so that it at least partially passes through said interior region toward said bottom surface in order to provide a first heat path from said chip mounting area to said bottom surface, said hear path connecting said hear chip mounting area to said bottom surface without passing through said first side surface and said second side surface, wherein said lateral portion extends from said chip mounting area through said first side surface and a portion of said second section extends through said second side surface, and wherein said first heat path has less thermal resistance than a heat path through either said lateral portion or said second section.
2. The packaged circuit of claim 1 further comprising a second extension, said second extension being connected to said chip mounting area and being bent downward to provide a second heat path from said chip mounting area to said bottom surfacer said second heat path having less thermal resistance than a heat path through either said lateral portion or said second section.
3. The packaged circuit of claim 1 wherein said first extension comprises a portion that extends through said bottom surface and is coplanar with said bottom surface.
4. The packaged circuit of claim 1 wherein said portion of said second section that extends through said second side surface is bent to form a contact that is coplanar with said bottom surface.
5. The packaged circuit of claim 4 wherein said contact is on said bottom surface.
6. The packaged circuit of claim 1 wherein said integrated circuit chip comprises an LED and wherein said encapsulating layer includes a cup having an opening through which said chip mounting area and a portion of said second section can be accessed.
7. The packaged circuit of claim 6 wherein said LED has a first contact connected to said chip mounting area and a second contact connected to said second section, said LED being powered by applying a potential difference between said first section and said second section.