Flat panel display with repellant and border areas and method of manufacturing the same
View Patent ↗A flat panel display and a method of manufacturing the same, which allows the formation of an organic film by inkjet printing while avoiding overflow of ink into adjacent areas, thus increasing the uniformity of thickness of the organic film and decreasing manufacturing costs. The flat panel display includes a substrate, a first electrode layer formed on the substrate, ink with material for a light emission layer formed on an active area of the first electrode layer, a repellant area formed of organic material located around the active area, and a border area also formed of organic material located between the active area and the repellant area. A surface energy of the border area is higher than a surface energy of the repellant area.
1. A flat panel display with a substrate and a first electrode layer formed on the substrate, comprising:
an active area defined on a part of the first electrode layer;
a repellant area positioned adjacent to the active area and comprising a first layer; and
a border area positioned between the active area and the repellant area and comprising a second layer,
wherein a surface energy of the second layer is higher than a surface energy of the first layer, and
wherein a top surface of the first layer and a top surface of the second layer are equidistant from a top surface of the substrate.
2. The flat panel display of claim 1 , wherein the second layer is arranged on the first electrode layer.
3. The flat panel display of claim 1 , wherein the first layer covers an edge of the first electrode layer.
4. The flat panel display of claim 1 , wherein the first layer and the second layer comprise an organic material.
5. The flat panel display of claim 1 , wherein the first layer and the second layer comprise a photosensitive material.
6. The flat panel display of claim 1 , wherein the first layer and the second layer have thicknesses between about 100 nm and about 20 μm.
7. The flat panel display of claim 1 , further comprising a material for a light emission layer arranged on a portion of the active area.
8. The flat panel display of claim 1 , further comprising:
a thin film transistor with a source electrode and a drain electrode,
wherein the source electrode or the drain electrode is coupled with the first electrode layer.
9. The flat panel display of claim 1 , wherein the repellant area is positioned around the active area.
10. The flat panel display of claim 1 , further comprising a second electrode layer arranged on the active area.