IP Library Granted Patent US 7,804,869
Granted Patent B2
US 7,804,869 · App. 11/419,592 · Granted Sep 28, 2010

Gallium nitride based semiconductor device with electron blocking layer

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Quick Facts
Patent No.
US 7,804,869
App. No.
11/419,592
Granted
Sep 28, 2010
Kind
B2
Abstract

A semiconductor device comprises an n-side waveguide layer, an active layer in contact with the n-side waveguide layer and a p-side waveguide layer in contact with the active layer. An electron blocking layer is in contact with the p-side waveguide layer and comprises a first composition of two elements from group III of the periodic table and an element from group V of the periodic table. A cladding layer includes a cladding sublayer that is in contact with the electron blocking layer. The cladding sublayer comprises a second composition of two elements from group III of the periodic table and an element from group V of the periodic table. The second composition is different from the first composition.

Claims (59)

1. A semiconductor device comprising:

an n-side waveguide layer;

an active layer in contact with the n-side waveguide layer;

a p-side waveguide layer in contact with the active layer;

an electron blocking layer in contact with the p-side waveguide layer, the electron blocking layer comprising a first composition of two elements from group III of the periodic table and an element from group V of the periodic table; and

a cladding layer, the cladding layer including a first cladding sublayer in contact with the electron blocking layer and in contact with a second cladding sublayer, the first cladding sublayer being disposed between the second cladding sublayer and the electron blocking layer;

wherein the first cladding sublayer comprises a second composition of two elements from group III of the periodic table and an element from group V of the periodic table, the second composition being different from the first composition; and

wherein the first cladding sublayer has a higher conduction band level than the second cladding sublayer.

2. The semiconductor device of claim 1 , wherein the semiconductor device comprises a laser.

3. The semiconductor device of claim 1 , wherein the electron blocking layer has a higher conduction band level than the first cladding sublayer.

4. The semiconductor device of claim 1 , wherein the electron blocking layer is configured to form a potential barrier for the flow of electrons from the active layer and the p-side waveguide layer into the cladding layer.

5. The semiconductor device of claim 4 , wherein the potential barrier has a height of at least about 50 millielectron volts.

6. The semiconductor device of claim 1 , wherein the electron blocking layer is more than about ten nanometers thick.

7. The semiconductor device of claim 1 , wherein the electron blocking layer is doped with magnesium.

8. The semiconductor device of claim 1 , wherein the active layer comprises one or more quantum wells.

9. The semiconductor device of claim 1 , wherein the cladding layer is a stressed layer superlattice.

10. The semiconductor device of claim 9 , wherein the stressed layer superlatice comprises a plurality of sublayers comprising aluminum gallium nitride and a plurality of sublayers comprising gallium nitride.

11. The semiconductor device of claim 1 , further comprising two or more electrical contacts operative to allow the flowing of electrical current through at least a portion of the semiconductor device.

12. A semiconductor device comprising:

an n-side waveguide layer;

an active layer in contact with the n-side waveguide layer;

a p-side waveguide layer in contact with the active layer;

an electron blocking layer in contact with the p-side waveguide layer, the electron blocking layer comprising aluminum gallium nitride of a first composition; and

a cladding layer, the cladding layer including a first cladding sublayer in contact with the electron blocking layer and in contact with a second cladding sublayer, the first cladding sublayer being disposed between the second cladding sublayer and the electron blocking layer;

wherein the first cladding sublayer comprises aluminum gallium nitride of a second composition different from the first composition; and

wherein the first cladding sublayer has a higher conduction band level than the second cladding sublayer.

13. The semiconductor device of claim 12 , wherein the aluminum gallium nitride of the second composition has a lower atomic percentage of aluminum than the aluminum gallium nitride of the first composition.

14. The semiconductor device of claim 12 , wherein the aluminum gallium nitride of the second composition has a lower concentration of aluminum than the aluminum gallium nitride of the first composition.

15. A method of forming a semiconductor device, the method comprising the steps of:

forming an n-side waveguide layer;

forming an active layer in contact with the n-side waveguide layer;

forming a p-side waveguide layer in contact with the active layer;

forming an electron blocking layer in contact with the p-side waveguide layer, the electron blocking layer comprising a first composition of two elements from group III of the periodic table and an element from group V of the periodic table; and

forming a cladding layer, the cladding layer including a first cladding sublayer in contact with the electron blocking layer and in contact with a second cladding sublayer, the first cladding sublayer being disposed between the second cladding sublayer and the electron blocking layer;

wherein the first cladding sublayer comprises a second composition of two elements from group III of the periodic table and an element from group V of the periodic table, the second composition being different from the first composition; and

wherein the first cladding sublayer has a higher conduction band level than the second cladding sublayer.

16. The method of claim 15 , wherein the method comprises metal organic chemical vapor deposition.

17. The method of claim 15 , wherein the method comprises molecular beam epitaxy.

18. The method of claim 15 , wherein the method comprises epitaxial lateral overgrowth of gallium nitride on sapphire.

19. An apparatus including:

a semiconductor device comprising:

an n-side waveguide layer;

an active layer in contact with the n-side waveguide layer;

a p-side waveguide layer in contact with the active layer;

an electron blocking layer in contact with the p-side waveguide layer, the electron blocking layer comprising a first composition of two elements from group III of the periodic table and an element from group V of the periodic table; and

a cladding layer, the cladding layer including a first cladding sublayer in contact with the electron blocking layer and in contact with a second cladding sublayer, the first cladding sublayer being disposed between the second cladding sublayer and the electron blocking layer;

wherein the first cladding sublayer comprises a second composition of two elements from group III of the periodic table and an element from group V of the periodic table, the second composition being different from the first composition; and

wherein the first cladding sublayer has a higher conduction band level than the second cladding sublayer; and

control circuitry, the control circuitry operative to control the semiconductor device.

20. The apparatus of claim 19 , wherein the apparatus is an optical disc drive capable of operating in accordance with at least one of the Blu-ray Disc format and the High Density Digital Versatile Disc format.

21. A semiconductor device comprising:

an n-side waveguide layer;

an active layer in contact with the n-side waveguide layer;

a p-side waveguide layer in contact with the active layer;

an electron blocking layer in contact with the p-side waveguide layer, the electron blocking layer comprising a composition of three elements from group III of the periodic table and an element from group V of the periodic table; and

a cladding layer, the cladding layer including a first cladding sublayer in contact with the electron blocking layer and in contact with a second cladding sublayer, the first cladding sublayer being disposed between the second cladding sublayer and the electron blocking layer;

wherein the first cladding sublayer comprises a second composition of two elements from group III of the periodic table and an element from group V of the periodic table, the second composition being different from the first composition; and

wherein the first cladding sublayer has a higher conduction band level than the second cladding sublayer.

22. The semiconductor device of claim 21 , wherein the electron blocking layer comprises indium aluminum gallium nitride.

Assignments (10)
CORRECTIVE ASSIGNMENT TO CORRECT THE PROPERTY NUMBERS PREVIOUSLY RECORDED AT REEL: 47630 FRAME: 344. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Mar 21, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048883/0267 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF MERGER TO 9/5/2018 PREVIOUSLY RECORDED AT REEL: 047196 FRAME: 0687. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047630/0344 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047196/0687 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
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PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032856-0031) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 037684/0039 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 20, 2015
From: AGERE SYSTEMS LLC
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 035059/0001 →
MERGER Recorded Feb 20, 2015
From: AGERE SYSTEMS INC.
To: AGERE SYSTEMS LLC
Reel/Frame 035058/0895 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: LSI CORPORATION; AGERE SYSTEMS LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032856/0031 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 22, 2006
From: FREUND, JOSEPH MICHAEL
To: AGERE SYSTEMS INC.
Reel/Frame 017662/0721 →