IP Library Granted Patent US 7,569,416
Granted Patent B2
US 7,569,416 · App. 11/424,655 · Granted Aug 4, 2009

Forming closely spaced electrodes

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Quick Facts
Patent No.
US 7,569,416
App. No.
11/424,655
Granted
Aug 4, 2009
Kind
B2
Abstract

The present invention provides an apparatus and a method of fabricating the apparatus. The apparatus comprises a substrate having a planar surface and first and second electrodes located on the planar surface. The first electrode has a top surface and a lateral surface, and the lateral surface has an edge near or in contact with the substrate. An electrode insulating layer is located on the top surface and a self-assembled layer located on the lateral surface. The second electrode is in contact with both the self-assembled layer and the electrode insulating layer.

Claims (18)

1. A method comprising,

forming a first electrode on a planar surface of a substrate, said first electrode having a top surface and a lateral surface;

forming an electrode insulating layer on said top surface;

forming a self-assembling layer on said lateral surface; and

forming a second electrode on said planar surface such that said second electrode is in contact with both said self-assembling layer and said electrode insulating layer.

2. The method of claim 1 , wherein said self-assembling layer comprises a stack of at least two self-assembled monolayers.

3. The method of claim 1 , wherein forming said self-assembling layer comprises linking ends of self-assembling monolayers together through metal-sulphur bonds.

4. The method of claim 1 , wherein said self-assembling layer comprises nonconductive organic molecules.

5. The method of claim 1 , wherein said self-assembling layer comprises semiconductive organic molecules.

6. The method of claim 1 , further comprises forming an organic field effect transistor, said first and second electrodes being source and drain electrodes of said transistor.

7. The method of claim 1 , further comprises forming an organic field effect transistor, wherein a yield of said transistors having an absence of electrical defects is greater than about 90 percent.

8. The method of claim 1 , wherein said first electrode and electrode insulating layer are formed using collimated vapor beam deposition such that a footprint of said electrode insulating layer is substantially aligned with said top surface.

9. The method of claim 1 , wherein said first and second electrodes are in contact with opposite sides of said electrode insulating layer.

10. The method of claim 1 , wherein said second electrode overhangs said first electrode.

11. The method of claim 1 , wherein a thickness of said electrode insulating layer is greater than a separation distance between said first electrode and said second electrode.

12. The method of claim 2 , wherein said stack is formed by depositing a first self-assembling monolayer of organic molecules on said lateral surface and bonding ends of said organic molecules to ends of organic molecules of a second self-assembling monolayer.

13. The method of claim 3 , wherein said linking ends comprises alternating exposing said lateral surface to self-assembling organic molecules and a coupling agent.

14. The method of claim 13 , wherein said coupling agent comprises cupric perchlorate and said self-assembling organic molecules comprise mercapto-functionalized organic molecules.

Assignments (3)
CONFIRMATORY LICENSE Recorded Mar 17, 2017
From: PRINCETON UNIVERSITY
To: NAVY, SECRETARY OF THE UNITED STATES OF AMERICA
Reel/Frame 042051/0491 →
MERGER Recorded Jun 12, 2009
From: LUCENT TECHNOLOGIES INC.
To: ALCATEL-LUCENT USA INC.
Reel/Frame 022818/0577 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 16, 2006
From: BAO, ZHENAN; ZHENG, JIM; STURM, JAMES C.; GRAVES-ABE, TROY
To: LUCENT TECHNOLOGIES INC.; PRINCETON UNIVERSITY
Reel/Frame 017800/0110 →