Semiconductor device
View Patent ↗A semiconductor device capable of reducing electrical leakage generated when a contact hole is misaligned and a manufacturing method thereof is disclosed. The semiconductor device includes three conductive layers with various and different portions overlapping each other. The conductive layers are separated by insulating layers and connected by contact holes formed in the insulating layers between the overlapping potions. Thus, electric leakage, caused by misalignment when forming the contact hole to electrically connect the conductive layers to each other, can be prevented.
1. A semiconductor device comprising:
a first insulating layer formed over a substrate;
a first conductive layer formed over the first insulating layer;
a second insulating layer formed over the first conductive layer;
a second conductive layer formed over the second insulating layer and having a first overlapping portion that overlaps the first conductive layer at a first position;
a third insulating layer formed over the second conductive layer;
a third conductive layer formed over the third insulating layer, the third conductive layer having a second overlapping portion that overlaps the second conductive layer at a second position different from the first position and having a third overlapping portion that overlaps the first conductive layer and the second conductive layer at a third position different from the first and second positions; and
a contact hole formed in at least one of the first overlapping portion and the second overlapping portion and electrically connecting two out of said first, second, and third conductive layers to each other.
2. The semiconductor device of claim 1 , wherein each of the conductive layers is one of a line shape or a L-type cranked shape having at least one extending portion extended to a predetermined width.
3. The semiconductor device of claim 2 , wherein at least one of the plurality of conductive layers is a line shape having at least one extending portion extended to a predetermined width.
4. The semiconductor device of claim 3 , wherein the diameter of the contact hole is less than the widths of the overlapped conductive layers.
5. The semiconductor device of claim 1 , wherein no contact holes are formed between the third conductive layer and either the first conductive layer or the second conductive layer in the third overlapping portion.
6. The semiconductor device of claim 1 , wherein no contact holes are formed in the third overlapping portion.
7. The semiconductor device of claim 1 , wherein the third conductive layer has a fourth overlapping portion that overlays the first conductive layer at a fourth position different from the first, second, and third positions.
8. A semiconductor device comprising:
a first metal line extending in a first direction on a first level;
a second metal line extending in a second direction generally transverse to the first direction, the second metal line being on a second level, the second level higher than the first level;
a third metal line extending generally in the first direction, the third metal line being on a third level, the third level higher than the second level, the third metal line including a first portion overlapping the first metal line, the third metal line including a second portion overlapping the first metal line and the second metal line;
a protuberance electrically connected to the third metal line, the protuberance extending generally in the second direction on the third level, the protuberance overlapping a portion of the second metal line; and
an interconnect electrically and mechanically connecting the protuberance and portion of the second metal line.
9. The semiconductor device of claim 8 , further comprising:
a second protuberance connected to the first metal line, the second protuberance extending generally in the second direction on the first level, the second protuberance being overlapped by a second portion of the second metal line; and
a second interconnect electrically and mechanically connecting the second protuberance and the second portion of the second metal line.
10. The semiconductor device of claim 8 , further comprising:
a second protuberance connected to the second metal line, the second protuberance extending generally in the first direction on the second level, the second protuberance overlapping a portion of the first metal line; and
a second interconnect electrically and mechanically connecting the second protuberance and the portion of the first metal line.
11. The semiconductor device of claim 8 , wherein no interconnects are formed between the third metal line and either the first metal line or the second metal line where the first, second, and third metal lines overlap.
12. The semiconductor device of claim 8 , wherein no interconnects are formed where the first, second, and third metal lines overlap.