IP Library Granted Patent US 7,880,214
Granted Patent B2
US 7,880,214 · App. 11/431,569 · Granted Feb 1, 2011

Nonvolatile semiconductor device

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Quick Facts
Patent No.
US 7,880,214
App. No.
11/431,569
Granted
Feb 1, 2011
Kind
B2
Abstract

A nonvolatile semiconductor storage device in which one unit cell comprises a select gate 3 ( 3 a - 3 i ) provided in a first region on a substrate 1 ; a floating gate 6 provided in a second region adjacent to the first region; a diffused region 7 b adjacent to the second region and provided in a third region on the surface of the substrate 1 ; and a control gate 11 provided on the floating gate 6 . The select gate 3 is divided into three or more in an erase block 23 composed of all unit cells, from each of which electrons are extracted from the floating gate, at the same time when an erase operation is performed. Each of the select gates 3 a - 3 i , created by the division, is formed in a comb-like shape in which, when viewed from the direction of a normal line to a plane, a plurality of comb teeth extend from a common line. The comb teeth of a select gate (for example, 3 b ) are arranged in gaps between the comb teeth of an adjacent select gate (for example, 3 a , 3 c ) at a predetermined spacing.

Claims (11)

1. A nonvolatile semiconductor storage device comprising a plurality of cells organized within one or more erase block units, each cell comprising:

a select gate provided in a first region on a substrate via a first insulator film;

a floating gate provided in a second region adjacent to said first region via a second insulator film;

a diffused region adjacent to said second region and provided in a third region on a surface of said substrate; and

a control gate provided on said floating gate via a third insulator film,

wherein all cells within an erase block unit can be selectively erased as a unit by applying a first voltage to the select gates located within said erase block and a second voltage applied to the control gates of said erase block unit, so that electrons are extracted from floating gates of said cells when an erase operation is performed,

wherein select gates in an erase block unit are formed in a plurality of comb-like shapes in which, when viewed from a direction of a normal line to a plane, a plurality of comb teeth extend from a common line of the comb-like shape,

wherein the comb teeth of a first select gate comb-like shape are arranged in gaps between the comb teeth of a second select gate comb-like shape at a predetermined spacing, and

wherein the comb teeth of the first select gate comb-like shape extend to both sides of the common line of the first select gate comb-like shape and the comb teeth of the second select gate comb-like shape extend to both sides of the common line of the second select gate comb-like shape, in a direction orthogonal to the common line.

2. The nonvolatile semiconductor storage device as defined in claim 1 , further comprising at least one comb-like shape having comb teeth extending to only one side in a direction orthogonal to the common line.

3. The nonvolatile semiconductor storage device of claim 1 , further comprising a driver connection for each said select gate comb-like structure.

Assignments (3)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
CHANGE OF NAME Recorded Nov 4, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025311/0833 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 11, 2006
From: SUDO, NAOAKI; KANAMORI, KOHJI
To: NEC ELECTRONICS CORPORATION
Reel/Frame 017863/0974 →