IP Library Granted Patent US 7,358,718
Granted Patent B2
US 7,358,718 · App. 11/434,736 · Granted Apr 15, 2008

Semiconductor device and electronics device

Assignee: Fujitsu Limited
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Quick Facts
Patent No.
US 7,358,718
App. No.
11/434,736
Granted
Apr 15, 2008
Kind
B2
Abstract

A plurality of switch circuits are disposed so as to correspond to a plurality of circuit blocks, respectively. Each of the plurality of switch circuits is connected between a power supply terminal of a corresponding circuit block and a power supply line. A setting circuit is disposed to set each of the plurality of switch circuits to be in a valid or invalid state. A switch control circuit turns on each of the plurality of switch circuits according to a first control signal for indicating an operation state of the plurality of circuit blocks when each of the plurality of switch circuits is set in a valid state by the setting circuit and turns on each of the plurality of switch circuits regardless of the first control signal when each of the plurality of switch circuits is set in an invalid state by the setting circuit.

Claims (41)

1. A semiconductor device comprising:

a plurality of circuit blocks;

a plurality of switch circuits disposed so as to correspond to said plurality of circuit blocks, respectively, and connected between a power supply terminal of a corresponding circuit block and a power supply line;

a setting circuit which sets each of said plurality of switch circuits to be in a valid or invalid state; and

a switch control circuit that turns on each of said plurality of switch circuits in accordance with a first control signal when it is set in the valid state by said setting circuit, and turns on each of said plurality of switch circuits regardless of the first control signal when it is set in the invalid state by said setting circuit, the first control signal being for indicating an operation state of said plurality of circuit blocks.

2. The semiconductor device according to claim 1 , wherein:

said setting circuit includes a test mode circuit that inactivates in a normal mode a plurality of test mode signals corresponding to said plurality of switch circuits respectively, and activates in a test mode one of the plurality of test mode signals designated by test mode information; and

said switch control circuit turns on each of said plurality of switch circuits in accordance with the first control signal when a corresponding test mode signal is inactivated, and turns on each of said plurality of switch circuits regardless of the first control signal when the corresponding test mode signal is activated.

3. The semiconductor device according to claim 1 , wherein:

said setting circuit includes a plurality of storage circuits which are disposed so as to correspond to said plurality of switch circuits respectively, store validity or invalidity of a corresponding switch circuit, and activates a storage state signal when storing the invalidity; and

said switch control circuit turns on each of said plurality of switch circuits in accordance with the first control signal when a corresponding storage state signal is inactivated, and turns on each of said plurality of switch circuits regardless of the first control signal when the corresponding storage state signal is activated.

4. The semiconductor device according to claim 3 , wherein

each of said plurality of storage circuits includes a fuse circuit programming validity or invalidity of the corresponding switch circuit.

5. The semiconductor device according to claim 1 , wherein said setting circuit includes:

a test mode circuit which inactivates in a normal mode a plurality of test mode signals corresponding to said plurality of switch circuits respectively and activates in a test mode one of the plurality of test mode signals designated by test mode information;

a plurality of storage circuits disposed so as to correspond to said plurality of switch circuits respectively, storing validity or invalidity of a corresponding switch circuit, and activating a storage state signal when storing the invalidity; and

a uniting circuit that activates each of a plurality of second control signals corresponding to said plurality of switch circuits respectively when one of a corresponding test mode signal and a corresponding storage state signal is activated, wherein

said switch control circuit turns on each of said plurality of switch circuits in accordance with the first control signal when a corresponding second control signal is inactivated, and turns on each of said plurality of switch circuits regardless of the first control signal when the corresponding second control signal is activated.

6. The semiconductor device according to claim 5 , wherein

each of said plurality of storage circuits includes a fuse circuit programming validity or invalidity of the corresponding switch circuit.

7. An electronics device comprising

a semiconductor device having:

a plurality of circuit blocks;

a plurality of switch circuits disposed so as to correspond to said plurality of circuit blocks, respectively, and connected between a power supply terminal of a corresponding circuit block and a power supply line;

a setting circuit which sets each of said plurality of switch circuits to be in a valid or invalid state; and

a switch control circuit that turns on each of said plurality of switch circuits in accordance with a first control signal when it is set in the valid state by said setting circuit, and turns on each of said plurality of switch circuits regardless of the first control signal when it is set in the invalid state by said setting circuit, the first control signal being for indicating an operation state of said plurality of circuit blocks.

8. The electronics device according to claim 7 , wherein:

said setting circuit includes a test mode circuit that inactivates in a normal mode a plurality of test mode signals corresponding to said plurality of switch circuits respectively, and activates in a test mode one of the plurality of test mode signals designated by test mode information; and

said switch control circuit turns on each of said plurality of switch circuits in accordance with the first control signal when a corresponding test mode signal is inactivated, and turns on each of said plurality of switch circuits regardless of the first control signal when the corresponding test mode signal is activated.

9. The electronics device according to claim 7 , wherein:

said setting circuit includes a plurality of storage circuits which are disposed so as to correspond to said plurality of switch circuits respectively, store validity or invalidity of a corresponding switch circuit, and activates a storage state signal when storing the invalidity; and

said switch control circuit turns on each of said plurality of switch circuits in accordance with the first control signal when a corresponding storage state signal is inactivated, and turns on each of said plurality of switch circuits regardless of the first control signal when the corresponding storage state signal is activated.

10. The electronics device according to claim 9 , wherein

each of said plurality of storage circuits includes a fuse circuit programming validity or invalidity of the corresponding switch circuit.

11. The electronics device according to claim 7 , wherein said setting circuit includes:

a test mode circuit which inactivates in a normal mode a plurality of test mode signals corresponding to said plurality of switch circuits respectively and activates in a test mode one of the plurality of test mode signals designated by test mode information;

a plurality of storage circuits disposed so as to correspond to said plurality of switch circuits respectively, storing validity or invalidity of a corresponding switch circuit, and activating a storage state signal when storing the invalidity; and

a uniting circuit that activates each of a plurality of second control signals corresponding to said plurality of switch circuits respectively when one of a corresponding test mode signal and a corresponding storage state signal is activated, wherein

said switch control circuit turns on each of said plurality of switch circuits in accordance with the first control signal when a corresponding second control signal is inactivated, and turns on each of said plurality of switch circuits regardless of the first control signal when the corresponding second control signal is activated.

12. The electronics device according to claim 11 , wherein

each of said plurality of storage circuits includes a fuse circuit programming validity or invalidity of the corresponding switch circuit.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 27, 2015
From: FUJITSU SEMICONDUCTOR LIMITED
To: SOCIONEXT INC.
Reel/Frame 035508/0469 →
CHANGE OF NAME Recorded Jul 22, 2010
From: FUJITSU MICROELECTRONICS LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 024982/0245 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 12, 2008
From: FUJITSU LIMITED
To: FUJITSU MICROELECTRONICS LIMITED
Reel/Frame 021998/0645 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 17, 2006
From: FUJIEDA, WAICHIRO
To: FUJITSU LIMITED
Reel/Frame 017909/0208 →
Priority Claims (1)
JP 2006-040379 · Feb 17, 2006 · national
Continuity (1)
Related Publication 20070205755A1 · Sep 6, 2007