IP Library Patent Application 11436062
Patent Application
App. No. 11/436,062

Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication

Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US None
App. No.
11/436,062
Abstract

Fabrication of monolithic lattice-mismatched semiconductor heterostructures with limited area regions having upper portions substantially exhausted of threading dislocations, as well as fabrication of semiconductor devices based on such lattice-mismatched heterostructures.

Claims (53)

1 . A semiconductor structure comprising:

(a) a substrate having a surface and comprising a first semiconductor material;

(b) a dislocation-blocking mask disposed over the substrate, the mask having a trench extending to the surface of the substrate, the trench being defined by at least one sidewall, the sidewall having a height h at least equal to a predetermined distance H from the surface of the substrate the trench being substantially rectangular and having a predetermined width W; and

(c) a regrowth layer comprising a second semiconductor material formed in the trench,

wherein a ratio of the height of the trench to the width of the trench is >0.5 and dislocation defects in the regrowth layer terminate at the sidewall of the trench at or below predetermined distance H.

2 . (canceled)

3 . The structure of claim 33 wherein the first semiconductor material is non-polar, the second semiconductor material is polar, and the orientation angle causes anti-phase boundaries in the regrowth layer to decrease in density with increasing distance from the surface of the substrate.

4 . A structure comprising:

(a) a substrate having a surface and comprising a first semiconductor material;

(b) a dislocation-blocking mask disposed over the substrate, the mask having an opening extending to the surface of the substrate, the opening being defined by at least one sidewall, the sidewall having a height h at least equal to a predetermined distance H from the surface of the substrate, the opening having a predetermined width W; and

(c) a regrowth layer comprising a second semiconductor material formed in the opening,

wherein the opening in the dislocation-blocking mask is characterized by a variable width, a ratio of the height of the trench to a narrowest width of the opening is >0.5. and dislocation defects in the regrowth layer terminate at the sidewall of the trench at or below predetermined distance H.

5 - 7 . (canceled)

8 . The structure of claim 1 wherein the first semiconductor material comprises silicon or a silicon germanium alloy.

9 . The structure of claim 1 wherein the second semiconductor material is selected from the group consisting of a group II, a group III, a group IV, a group V, and a group VI element, and combinations thereof.

10 . (canceled)

11 . The structure of claim 1 wherein the crystallographic direction is aligned with at least one direction of propagation of the dislocation defects in the regrowth layer.

12 . (canceled)

13 . The structure of claim 1 wherein the surface of the substrate has a crystallographic orientation selected from the group consisting of: (100), (110), and (111).

14 . (canceled)

15 . The structure of claim 1 wherein the dislocation-blocking mask comprises a dielectric material.

16 . (canceled)

17 . The structure of claim 1 , further comprising an overgrowth layer comprising the second semiconductor material disposed over the regrowth layer and over at least a portion of the dislocation-blocking mask.

18 . (canceled)

19 . A semiconductor device formed over a substrate having a surface and including a first semiconductor material, the device comprising:

(a) a dislocation-blocking mask disposed over the substrate, the mask having an opening extending to the surface of the substrate and defined by at least one sidewall, a ratio of a height of the opening to a width of the opening being >0.5; and

(b) a regrowth region formed in the opening, the regrowth region including:

i. a first portion comprising a second semiconductor material and disposed proximal to the surface of the substrate, dislocation defects in the regrowth region substantially terminating in the first portion; and

ii. a second portion disposed above the first portion the second portion comprising a third semiconductor material;

(c) a channel region disposed in the second portion of the regrowth region; and

(d) a source region and a drain region, the channel region being disposed therebetween.

20 . The device of claim 19 wherein the first semiconductor material comprises silicon.

21 . The device of claim 19 wherein the semiconductor substrate comprises

(a) a silicon wafer;

(b) an insulating layer disposed thereon; and

(c) a strained semiconductor layer disposed on the insulating layer.

22 . The device of claim 21 wherein the strained semiconductor layer comprises silicon or germanium.

23 . (canceled)

24 . The device of claim 19 wherein the semiconductor substrate comprises:

(a) a silicon wafer;

(b) a compositionally uniform relaxed Si 1-x Ge x , layer deposited thereon; and

(c) a strained silicon layer deposited on the relaxed Si 1-x Ge x , layer.

25 . (canceled)

26 . (canceled)

27 . The device of claim 19 , further comprising a lattice-mismatched layer disposed between at least a portion of the substrate and the dislocation-blocking mask, the lattice-mismatched layer comprising a second semiconductor material and being at least partially relaxed.

28 . (canceled)

29 . The device of claim 19 wherein at least one of the second semiconductor material and the third semiconductor material is selected from the group consisting of a group II, a group III, a group IV, a group V, and a group VI element, and combinations thereof.

30 . (canceled)

31 . The device of claim 19 wherein the first portion of the regrowth region comprises silicon germanium and the second portion of the regrowth region comprises a layer of strained germanium.

32 . The device of claim 19 wherein the first portion of the regrowth region comprises indium phosphide and the second portion of the regrowth region comprises a layer of indium gallium arsenide disposed over a layer of indium aluminum arsenide.

33 . The structure of claim 1 , wherein at least a portion of the sidewall meets the surface of the substrate at an orientation angle to a selected crystallographic direction of the first semiconductor material, and the orientation angle causes the dislocation defects in the regrowth layer to decrease in density with increasing distance from the surface of the substrate.

34 . The device of claim 19 , wherein a width of the opening is less than 1 micrometer.

35 . The device of claim 19 , wherein a portion of the sidewall meets the surface of the substrate at an orientation angle to a selected crystallographic direction of the first semiconductor material.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 13, 2010
From: AMBERWAVE SYSTEMS CORPORATION
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 023775/0111 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 9, 2007
From: LOCHTEFELD, ANTHONY J.; CURRIE, MATTHEW T.; CHENG, ZHIYUAN; FIORENZA, JAMES; BRAITHWAITE, GLYN; LANGDO, THOMAS A.
To: AMBERWAVE SYSTEMS CORPORATION
Reel/Frame 018732/0820 →