IP Library Granted Patent US 8,217,920
Granted Patent B2
US 8,217,920 · App. 11/437,929 · Granted Jul 10, 2012

Data-holding circuit and substrate for a display device

Assignees: NEC Corporation; NLT Technologies, Ltd.
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Quick Facts
Patent No.
US 8,217,920
App. No.
11/437,929
Granted
Jul 10, 2012
Kind
B2
Abstract

A display device has a data-holding circuit with a capacitance and a display portion with a plurality of pixel electrodes, formed on a first carrier substrate. In the display device, a second carrier substrate disposed opposite the first carrier substrate is placed above the display portion, but the opposing substrate is not present above the area in which the data-holding circuit is disposed. The parasitic capacitance of the data-holding circuit can thereby be reduced. Therefore, the capacitance in the data-holding circuit can be reduced and the area required can be reduced as well. The display data of all the pixels is sent serially to the liquid crystal module without high-speed transfer for each frame time interval, and size can be reduced because the controller IC and interface circuit are formed on the same substrate as the display device substrate.

Claims (17)

1. An apparatus, comprising:

a display device comprising

a data-holding circuit having a capacitance;

a display portion having a plurality of pixel electrodes;

a first carrier substrate on which the data-holding circuit and the display portion are formed; and

a second carrier substrate that is disposed opposite to the first carrier substrate being placed above the display portion, an opposing substrate being absent above an area in which the data-holding circuit is disposed,

wherein a provider of the capacitance comprises a sense amplifier circuit for amplifying and latching a magnitude of an electric potential between two nodes;

the sense amplifier circuit has a first and second latch circuit;

the display device has

a transmission control portion being provided that allows or disallows signal transmission between one of the two nodes and at least one of the first and second latch circuits; and

the output voltage amplitude of the first latch circuit is less than the output voltage amplitude of the second latch circuit; and

an electroconductive layer disposed around a periphery of the display device, a distance between the data-holding circuit and the electroconductive layer around the periphery of the display device being more than 100 times greater than a thickness of a dielectric body which constitutes the capacitance of the data-holding circuit.

2. The apparatus according to claim 1 , wherein a distance between the data-holding circuit and the electro conductive layer around the periphery is more than 1,000 times greater than the thickness of the dielectric body which constitutes the capacitance of the data-holding circuit.

3. The apparatus according to claim 1 , comprising:

a dielectric layer being disposed between the display device and an inner wall of the apparatus, the dielectric layer being composed of a low-k material.

4. The apparatus according to claim 1 , comprising:

a dielectric layer being disposed between the display device and an inner wall of the apparatus, the dielectric layer being composed of air.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 23, 2016
From: NEC CORPORATION
To: NLT TECHNOLOGIES, LTD.
Reel/Frame 037798/0297 →
CHANGE OF NAME Recorded Nov 8, 2011
From: NEC LCD TECHNOLOGIES, LTD.
To: NLT TECHNOLOGIES, LTD.
Reel/Frame 027195/0933 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 19, 2006
From: TAKATORI, KENICHI; HAGA, HIROSHI
To: NEC CORPORATION; NEC LCD TECHNOLOGIES, LTD.
Reel/Frame 017901/0282 →
Priority Claims (1)
JP 2005-336426 · Nov 21, 2005 · national
Continuity (1)
Related Publication 20070115229A1 · May 24, 2007