IP Library Granted Patent US 7,449,775
Granted Patent B1
US 7,449,775 · App. 11/439,039 · Granted Nov 11, 2008

Integrated thermal solution for electronic packages with materials having mismatched coefficient of thermal expansion

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Quick Facts
Patent No.
US 7,449,775
App. No.
11/439,039
Granted
Nov 11, 2008
Kind
B1
Abstract

A decoupling package stack including a circuit board, a substrate mounted on and electrically coupled to the circuit board, a semiconductor die mounted on and electrically coupled to the substrate a deformable elastomeric support mounted on the substrate, one or more mounts coupled to the circuit board and a heatsink. The heatsink includes a contoured heatsink base having a spacer attached thereto, the spacer operable to determine and maintain a desired bondline of a first thermal interface material (TIM) between the semiconductor die and the contoured heatsink base. The heatsink also includes one or more contact portions for contacting the deformable elastomeric support and one or more compressing surfaces coupled to the one or more mounts. A method for assembling a decoupling package stack.

Claims (35)

1. A decoupling package stack comprising:

a circuit board;

a substrate mounted on and electrically coupled to the circuit board;

a semiconductor die mounted on and electrically coupled to the substrate;

a deformable elastomeric support mounted on the substrate;

one or more mounts coupled to the circuit board; and

a heatsink including:

a contoured heatsink base having a spacer attached thereto, the spacer operable to determine and maintain a desired bondline of a first thermal interface material (TIM) between the semiconductor die and the contoured heatsink base;

one or more contact portions for contacting the deformable elastomeric support; and

one or more compressing surfaces coupled to the one or more mounts.

2. The decoupling package stack of claim 1 , wherein the contoured heatsink base provides for load staging.

3. The decoupling package stack of claim 1 , wherein the deformable elastomeric support shares a thermal load with the first TIM between the package and the contoured heatsink base.

4. The decoupling package stack of claim 1 , wherein the deformable elastomeric support shares a physical load with the semiconductor die.

5. The decoupling package stack of claim 1 , wherein a first portion of a physical load from the contoured heatsink base is applied to the deformable elastomeric support before a second portion of the physical load is applied to the semiconductor die.

6. The decoupling package stack of claim 5 , wherein the deformable elastomeric support is at least partially deformed before the second portion of the physical load is applied to the semiconductor die.

7. The decoupling package stack of claim 1 , further comprising a lid interposed between the semiconductor die and the contoured heatsink base.

8. The decoupling package stack of claim 7 , wherein the lid is thermally coupled by a second TIM interposed between the lid and the semiconductor die.

9. The decoupling package stack of claim 8 , wherein the lid distributes heat radiating from the semiconductor die to the contoured heatsink base.

10. The decoupling package stack of claim 1 , wherein the contoured heatsink base includes a secondary material.

11. The decoupling package stack of claim 1 , wherein the contoured heatsink base includes:

an enclosed cavity capable of containing a cooling media;

an inlet coupled to the cavity and capable of flowing the cooling media into the enclosed cavity; and

an outlet coupled to the cavity and capable of flowing the cooling media out of the enclosed cavity.

12. The decoupling package stack of claim 1 , wherein the elastomeric support wraps around an edge of the substrate.

13. A decoupling package stack comprising:

a circuit board;

a substrate mounted on and electrically coupled to the circuit board;

a semiconductor die mounted on and electrically coupled to the substrate;

a deformable elastomeric support mounted on the substrate;

one or more mounts coupled to the circuit board; and

a heatsink including:

a contoured heatsink base having a spacer attached thereto, the spacer operable to determine and maintain an desired bondline of a first thermal interface material (TIM) between the semiconductor die and the contoured heatsink base;

one or more contact portions for contacting the deformable elastomeric support; and

one or more compressing surfaces coupled to the one or more mounts;

wherein a first portion of a physical load from the contoured heatsink base is applied to the deformable elastomeric support before a second portion of the physical load is applied to the semiconductor die and wherein the deformable elastomeric support is at least partially deformed before the second portion of the physical load is applied to the semiconductor die and wherein the deformable elastomeric support shares a thermal load with the first TIM between the package and the contoured heatsink base.

Assignments (2)
MERGER AND CHANGE OF NAME Recorded Dec 16, 2015
From: ORACLE USA, INC.; SUN MICROSYSTEMS, INC.; ORACLE AMERICA, INC.
To: ORACLE AMERICA, INC.
Reel/Frame 037303/0926 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 25, 2006
From: ANKIREDDI, SESHASAYEE S.
To: SUN MICROSYSTEMS, INC.
Reel/Frame 017924/0887 →