IP Library Granted Patent US 7,494,900
Granted Patent B2
US 7,494,900 · App. 11/441,453 · Granted Feb 24, 2009

Back side wafer dicing

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Quick Facts
Patent No.
US 7,494,900
App. No.
11/441,453
Granted
Feb 24, 2009
Kind
B2
Abstract

Systems and methods for scribing a semiconductor wafer with reduced or no damage or debris to or on individual integrated circuits caused by the scribing process. The semiconductor wafer is scribed from a back side thereof. In one embodiment, the back side of the wafer is scribed following a back side grinding process but prior to removal of back side grinding tape. Thus, debris generated from the scribing process is prevented from being deposited on a top surface of the wafer. To determine the location of dicing lanes or streets relative to the back side of the wafer, the top side of the wafer is illuminated with a light configured to pass through the grinding tape and the wafer. The light is detected from the back side of the wafer, and the streets are mapped relative to the back side. The back side of the wafer is then cut with a saw or laser.

Claims (40)

1. A method of cutting a semiconductor wafer having a plurality of integrated circuits formed on or in a top surface thereof, the integrated circuits separated by one or more streets visible from the top surface of the semiconductor wafer, the method comprising:

illuminating the top surface of the semiconductor wafer with a light, a portion of the light passing through the one or more streets to a bottom surface of the semiconductor wafer;

imaging the portion of the light passing from the bottom surface of the semiconductor wafer so as to determine a location of the one or more streets relative to the bottom surface of the semiconductor wafer; and

cutting, from the bottom surface toward the top surface, a portion of the bottom surface of the semiconductor wafer corresponding to the location of the one or more streets.

2. The method of claim 1 , further comprising performing pattern recognition on an image of the portion of the light to detect a line corresponding to a street.

3. The method of claim 2 , wherein performing the pattern recognition comprises performing a Hough transform.

4. The method of claim 1 , wherein cutting the portion of the bottom surface comprises scribing a line on the bottom surface.

5. The method of claim 4 , further comprising breaking the semiconductor wafer into separate pieces along the scribed line.

6. The method of claim 1 , wherein cutting the portion of the bottom surface comprises scribing the bottom surface with a saw.

7. The method of claim 1 , wherein cutting the portion of the bottom surface comprises scribing the bottom surface with a laser.

8. The method of claim 1 , wherein the semiconductor wafer comprises silicon.

9. The method of claim 8 , wherein the light comprises infrared light.

10. The method of claim 9 , wherein the wavelength of the light is in a range between approximately 1.2 μm and approximately 1.3 μm.

11. The method of claim 1 , wherein the light is configured to pass through a protective layer over the top surface of the semiconductor wafer.

12. The method of claim 11 , wherein the protective layer comprises grinding tape.

13. The method of claim 11 , wherein the light passes through holes cut in the protective layer over the top surface of the semiconductor wafer.

14. A system for cutting a semiconductor wafer having a plurality of integrated circuits formed on or in a top surface thereof, the integrated circuits separated by one or more streets visible from the top surface of the semiconductor wafer, the system comprising:

a light source to illuminate the top surface of the semiconductor wafer with light, a portion of the light passing through the one or more streets to a bottom surface of the semiconductor wafer;

an imaging device to image the portion of the light passing from the bottom surface of the semiconductor wafer so as to determine a location of the one or more streets relative to the bottom surface of the semiconductor wafer; and

a cutting device to cut a portion of the bottom surface of the semiconductor wafer corresponding to the location of the one or more streets, the cutting device configured to cut from the bottom surface toward the top surface.

15. The system of claim 14 , further comprising a processor to perform pattern recognition on an image of the portion of the light to detect a line corresponding to a street.

16. The system of claim 15 , wherein performing the pattern recognition comprises performing a Hough transform.

17. The system of claim 14 , wherein cutting the portion of the bottom surface comprises scribing a line on the bottom surface.

18. The system of claim 14 , wherein the cutting device comprises a saw, and wherein cutting the portion of the bottom surface comprises scribing the bottom surface with the saw.

19. The system of claim 14 , wherein the cutting device comprises a laser, and wherein cutting the portion of the bottom surface comprises scribing the bottom surface with the laser.

20. The system of claim 14 , wherein the semiconductor wafer comprises silicon.

21. The system of claim 20 , wherein the light comprises infrared light.

22. The system of claim 21 , wherein the wavelength of the light is in a range between approximately 1.2 μm and approximately 1.3 μm.

23. The system of claim 14 , wherein the light is configured to pass through a protective layer over the top surface of the semiconductor wafer.

24. The system of claim 23 , wherein the protective layer comprises grinding tape.

25. The system of claim 23 , wherein the light passes through holes cut in the protective layer over the top surface of the semiconductor wafer.

26. A system for cutting a semiconductor wafer having a plurality of integrated circuits formed on or in a top surface thereof, the integrated circuits separated by one or more streets visible from the top surface of the semiconductor wafer, the system comprising:

means for illuminating the top surface of the semiconductor wafer with light, a portion of the light passing through the one or more streets to a bottom surface of the semiconductor wafer;

means for imaging the portion of the light passing from the bottom surface of the semiconductor wafer so as to determine a location of the one or more streets relative to the bottom surface of the semiconductor wafer; and

means for cutting a portion of the bottom surface of the semiconductor wafer corresponding to the location of the one or more streets, the cutting means cutting from the bottom surface toward the top surface.

27. The system of claim 26 , further comprising means for performing pattern recognition on an image of the portion of the light to detect a line corresponding to a street.

28. The system of claim 27 , wherein performing the pattern recognition comprises performing a Hough transform.

29. The system of claim 26 , wherein cutting the portion of the bottom surface comprises scribing a line on the bottom surface.

30. The system of claim 26 , wherein the light comprises infrared light.

31. The system of claim 26 , wherein the wavelength of the light is in a range between approximately 1.2 μm and approximately 1.3 μm.

Assignments (7)
RELEASE OF SECURITY INTEREST Recorded Aug 24, 2022
From: BARCLAYS BANK PLC
To: MKS INSTRUMENTS, INC.; NEWPORT CORPORATION; ELECTRO SCIENTIFIC INDUSTRIES, INC.
Reel/Frame 062739/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 24, 2022
From: BARCLAYS BANK PLC
To: MKS INSTRUMENTS, INC.; NEWPORT CORPORATION; ELECTRO SCIENTIFIC INDUSTRIES, INC.
Reel/Frame 063009/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE U.S. PATENT NO.7,919,646 PREVIOUSLY RECORDED ON REEL 048211 FRAME 0312. ASSIGNOR(S) HEREBY CONFIRMS THE PATENT SECURITY AGREEMENT (ABL). Recorded Jan 14, 2021
From: ELECTRO SCIENTIFIC INDUSTRIES, INC.; MKS INSTRUMENTS, INC.; NEWPORT CORPORATION
To: BARCLAYS BANK PLC, AS COLLATERAL AGENT
Reel/Frame 055668/0687 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE U.S. PATENT NO. 7,919,646 PREVIOUSLY RECORDED ON REEL 048211 FRAME 0227. ASSIGNOR(S) HEREBY CONFIRMS THE PATENT SECURITY AGREEMENT (TERM LOAN). Recorded Jan 14, 2021
From: ELECTRO SCIENTIFIC INDUSTRIES, INC.; MKS INSTRUMENTS, INC.; NEWPORT CORPORATION
To: BARCLAYS BANK PLC, AS COLLATERAL AGENT
Reel/Frame 055006/0492 →
PATENT SECURITY AGREEMENT (ABL) Recorded Feb 1, 2019
From: ELECTRO SCIENTIFIC INDUSTRIES, INC.; MKS INSTRUMENTS, INC.; NEWPORT CORPORATION
To: BARCLAYS BANK PLC, AS COLLATERAL AGENT
Reel/Frame 048211/0312 →
PATENT SECURITY AGREEMENT (TERM LOAN) Recorded Feb 1, 2019
From: ELECTRO SCIENTIFIC INDUSTRIES, INC.; MKS INSTRUMENTS, INC.; NEWPORT CORPORATION
To: BARCLAYS BANK PLC, AS COLLATERAL AGENT
Reel/Frame 048211/0227 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 5, 2006
From: HARRIS, RICHARD S.; LO, HO W.
To: ELECTRO SCIENTIFIC INDUSTRIES, INC.
Reel/Frame 018203/0850 →