Multi-layered capacitor
View Patent ↗According to the present invention, a multi-layered capacitor includes a first capacitive element having a first conductor plate formed on a first layer, a second conductor plate formed on a second layer and an insulator arranged between the first and second conductor plates; and a second capacitive element which is arranged just on a layer above or below the first capacitive element.
1. A multi-layered capacitor, comprising:
a first capacitive element having a first conductor plate formed on a first layer, a second conductor plate formed on a second layer and an insulator arranged between the first and second conductor plates; and
a second capacitive element which is disposed on a layer immediately above or below the first capacitive element,
wherein the second capacitive element comprises a first conductor region and a second conductor region formed on the same layer and wherein the first and second conductor regions of the second capacitive element are configured to be pectinated and engaged to each other.
2. A multi-layered capacitor, according to claim 1 , wherein the first capacitive element is of a MIM (Metal-Insulator-Metal) type.
3. A multi-layered capacitor, according to claim 1 , wherein the second capacitive element is of a MOM (Metal-Oxide-Metal) type, comprising first and second conductor regions formed on the same layer.
4. A multi-layered capacitor, according to claim 3 , further comprising:
a third capacitive element formed on an adjacent layer of the second capacitive element.
5. A multi-layered capacitor, according to claim 4 , wherein, the third capacitive element is of a POP (Poly-Oxide-Poly) type, comprising a pair of poly-silicon regions and a silicon oxide region formed between the pair of poly-silicon regions.
6. A multi-layered capacitor, according to claim 4 , wherein the third capacitive element is of a MOS-CAP (Metal Oxide Semiconductor Capacitor) structure.
7. A multi-layered capacitor, according to claim 1 , wherein the second capacitive element is of a POP (Poly-Oxide-Poly) type, comprising a pair of poly-silicon regions and an silicon oxide region formed between the pair of poly-silicon regions.
8. A multi-layered capacitor, according to claim 1 , wherein the second capacitive element is of a MOS-CAP (Metal Oxide Semiconductor Capacitor) structure.
9. A multi-layered capacitor, according to claim 1 , wherein the second capacitive element comprises a plurality of capacitive elements formed on different layers.