Shallow trench isolation formation
View Patent ↗A method and structure for forming a semiconductor structure. A semiconductor substrate is provided. A trench is formed within the semiconductor substrate. A first layer of electrically insulative material is formed within the trench. A first portion and a second portion of the first layer of electrically insulative material is removed. A second layer of electrically insulative material is selectively grown on the first layer comprising the removed first portion and the removed second portion.
1. A semiconductor structure, comprising:
a semiconductor substrate, wherein said semiconductor substrate comprises a trench formed within a first portion of a first surface of said semiconductor substrate;
a first layer of electrically insulative material located within the trench, wherein said first layer comprises a first recess and a second recess, and wherein the first recess is isolated from the second recess by a portion of the first layer; and
a second layer of electrically insulative material located on said first layer and within a first portion of said first recess and a first portion of said second recess, wherein said first portion of said first recess does not comprise an entire portion of said first recess, and wherein said first portion of said second recess does not comprise an entire portion of said second recess.
2. The semiconductor structure of claim 1 , wherein each of said first layer and said second layer comprises silicon dioxide.
3. The semiconductor structure of claim 1 , further comprising:
a third layer of electrically insulative material formed over said second layer and within a second portion of said first recess and a second portion of said second recess.
4. The semiconductor structure of claim 3 , wherein said third layer comprises silicon dioxide.
5. The semiconductor structure of claim 3 , further comprising:
a fourth layer of electrically insulative material formed on said third layer.
6. The semiconductor structure of claim 5 , wherein said fourth layer comprises silicon dioxide.
7. The semiconductor structure of claim 5 , wherein a portion of said fourth layer of electrically insulative material extends laterally over and parallel to a second portion and third portion of said first surface of said semiconductor substrate.
8. The semiconductor structure of claim 7 further comprising:
a silicon oxynitride layer formed on said fourth layer of electrically insulative material.
9. The semiconductor structure of claim 1 , wherein said first layer and said second layer in combination form a shallow trench isolation.
10. The semiconductor structure of claim 1 , wherein the semiconductor structure is a complementary metal oxide semiconductor (CMOS) semiconductor structure.
11. The semiconductor structure of claim 1 , wherein the first recess is located between a first side surface of the trench and a first surface of the portion of the first layer, and wherein the second recess is located between a second side surface of the trench and a second surface of the portion of the first layer.
12. The semiconductor structure of claim 11 , wherein the first surface of the portion of the first layer comprises a first concave surface, and wherein the second surface of the portion of the first layer comprises a second concave surface.
13. The semiconductor structure of claim 12 , wherein the second layer of electrically insulative material within the first recess comprises a first convex surface in contact with the first concave surface, and wherein the second layer of electrically insulative material within the second recess comprises a second convex surface in contact with the second concave surface.