Semiconductor device and manufacturing method of the semiconductor device
View Patent ↗A semiconductor device includes a semiconductor layer formed on an insulating layer; a gate electrode disposed on said semiconductor layer via a gate insulating film; a source/drain layer composed by including an alloy layer or a metal layer with a bottom surface in contact with the insulating layer, with joint surfaces to a channel region disposed along crystal orientation faces of said semiconductor layer; and impurity-doped layers formed in a self-aligned manner along interfaces of the alloy layer or the metal layer, and said semiconductor layer.
1. A manufacturing method of a semiconductor device, comprising the steps of:
forming a gate electrode above a semiconductor layer;
forming a source/drain layer composed by including an alloy layer or a metal layer joined to a channel region of the semiconductor layer;
introducing an impurity into the alloy layer or the metal layer, wherein the impurity includes one of As, P and B; and
by expelling the impurity introduced into the alloy layer or the metal layer to the semiconductor layer side, forming impurity-doped layers disposed at interfaces of the alloy layer or the metal layer and the semiconductor layer so as to make the alloy layer or the metal layer not to be in contact with the semiconductor layer being the channel region.
2. A manufacturing method of a semiconductor device, comprising the steps of:
forming a dummy gate electrode above a semiconductor layer;
forming a source/drain layer composed by including an alloy layer or a metal layer joined to a channel region of the semiconductor layer;
introducing an impurity into the alloy layer or the metal layer, wherein the impurity includes one of As, P and B;
by expelling the impurity introduced into the alloy layer or the metal layer to the semiconductor layer side, forming impurity-doped layers disposed at interfaces of the alloy layer or the metal layer and the semiconductor layer so as to make the alloy layer or the metal layer not to be in contact with the semiconductor layer being the channel region;
forming an insulating layer in which the dummy gate electrode is buried on the semiconductor layer;
forming a trench corresponding to the dummy gate electrode in the insulating layer by removing the dummy gate electrode buried in the insulating layer; and
burying the gate electrode into the trench.
3. A manufacturing method of a semiconductor device, comprising the steps of:
forming a gate electrode above a semiconductor layer disposed on an insulating layer;
forming side walls at side walls of the gate electrode;
forming a metal film on an entire surface on the semiconductor layer on which the side walls are formed;
by reacting the metal film with the semiconductor layer by first thermal treatment, forming an alloy layer disposed at sides of the side walls;
removing an unreacted metal film at a time of forming the alloy layer;
introducing an impurity into the alloy layer, wherein the impurity includes one of As, P and B; and
by causing a bottom surface of the alloy layer to be in contact with the insulating layer by second thermal treatment, forming a source/drain layer composed of the alloy layer with joint surfaces disposed along crystal orientation faces of the semiconductor layer, and by diffusing the impurity introduced into the alloy layer to the semiconductor layer side, forming impurity-doped layers disposed at interfaces of the source/drain layer and the semiconductor layer so as to make the alloy layer or the metal layer not to be in contact with the semiconductor layer being a channel region.
4. A manufacturing method of a semiconductor device, comprising the steps of:
forming a gate electrode above a semiconductor substrate;
forming side walls at side walls of the gate electrode;
forming a metal film on an entire surface on the semiconductor substrate on which the side walls are formed;
by reacting the metal film and the semiconductor substrate by first thermal treatment, forming an alloy layer disposed at sides of the side walls;
removing an unreacted metal film at a time of forming the alloy layer;
introducing an impurity into the alloy layer, wherein the impurity includes one of As, P and B; and
forming a source/drain layer composed of alloy layers with joint surfaces to a channel region disposed along crystal orientation faces of the semiconductor layer by second thermal treatment, diffusing the impurity introduced into the alloy layer to the semiconductor substrate side, and forming impurity-doped layers disposed at interfaces of the source/drain layer and the semiconductor substrate so as to make the alloy layer or the metal layer not to be in contact with the semiconductor layer being the channel region.
5. A manufacturing method of a semiconductor device, comprising the steps of:
forming a gate electrode above a semiconductor layer disposed on an insulating layer;
forming side walls at side walls of the gate electrode;
by etching the semiconductor layer with the gate electrode and the side walls as a mask, exposing inclined surfaces of the semiconductor layer along crystal orientation faces;
forming a metal film or an alloy film on an entire surface on the insulating layer so that the exposed inclined surfaces are covered;
introducing an impurity into the metal film or the alloy layer, wherein the impurity includes one of As, P and B;
by removing the metal film or the alloy film on the gate electrode, forming a source/drain layer composed of the metal film or the alloy film joined to the semiconductor layer via the crystal orientation faces so as to make the alloy layer or the metal layer not to be in contact with the semiconductor layer being a channel region; and
by diffusing the impurity introduced into the metal film or the alloy layer to a semiconductor layer side, forming impurity-doped layers disposed at interfaces of the source/drain layer and the semiconductor layer.
6. A manufacturing method of a semiconductor device, comprising the steps of:
forming a gate electrode above a semiconductor substrate;
forming side walls at side walls of the gate electrode;
by etching the semiconductor substrate with the gate electrode and the side walls as a mask, exposing inclined surfaces of the semiconductor substrate along crystal orientation faces of the semiconductor substrate;
forming a metal film or an alloy film on an entire surface on the semiconductor substrate so that the exposed inclined surfaces are covered;
introducing an impurity into the metal film or the alloy layer, wherein the impurity includes one of As, P and B;
by removing the metal film or the alloy film on the gate electrode, forming a source/drain layer composed of the metal film or the alloy film joined to the semiconductor substrate via the crystal orientation faces so as to make the alloy layer or the metal layer not to be in contact with the semiconductor layer being a channel region; and
by diffusing the impurity introduced into the metal film or the alloy layer to a semiconductor layer side, forming impurity-doped layers disposed at interfaces of the source/drain layer and the semiconductor layer.