Trimmable bandgap circuit
View Patent ↗A voltage bandgap circuit comprises a first transistor and a second transistor connected in a voltage bandgap circuit arrangement, the area of the first transistor is selected to be a predetermined multiple of the area of the second transistor; a differential input amplifier has a first input coupled to the first transistor and a second input coupled to the second transistor; the amplifier has its output coupled to an output node. A first trimmable resistance network is coupled to say the bandgap circuit and is trimmed to adjust the output voltage of the bandgap circuit based upon a single temperature voltage measurement made across two of the terminals of each transistor.
1. A voltage bandgap circuit comprising:
a first transistor and a second transistor connected in a voltage bandgap circuit arrangement; a differential input amplifier having a first input coupled to said first transistor and a second input coupled to said second transistor; said amplifier having its output coupled to on output node; and
a first trimmable resistance network coupled to said bandgap circuit arrangement, said first trimmable resistance network being trimmable to a resistance level to adjust the output voltage of said bandgap circuit at said output node, said resistance level having a predetermined relationship to a first predetermined voltage measurement made across two terminals of said first transistor at a single temperature; and
a single substrate comprising said voltage bandgap circuit arrangement, said differential input amplifier and said first trimmable resistance network.
2. A circuit in accordance with claim 1 , wherein:
the area of said first transistor selected to be a predetermined multiple of the area of said second transistor.
3. A circuit in accordance with claim 1 , wherein:
said first transistor is a diode connected bipolar transistor, and said second transistor is a diode connected bipolar transistor.
4. A circuit in accordance with claim 3 , wherein:
said substrate is processed utilizing CMOS N-well process technology.
5. A method of providing a bandgap circuit, comprising:
forming a bandgap circuit on a substrate, said bandgap circuit comprising a first transistor and a second transistor connected in a voltage bandgap circuit arrangement; a differential input amplifier having a first input coupled to said first node transistor and a second input coupled to said second transistor; said amplifier having its output coupled to an output node;
forming on said substrate a first trimmable resistance network coupled to said bandgap circuit arrangement,
performing an output voltage trimming sequence comprising:
measuring a first voltage across two terminals of said first transistor at a single temperature; utilizing said measured first voltage to determine a resistance value of said first trimmable resistance network; and trimming said first trimmable resistance network to said resistance value.
6. A method in accordance with claim 5 , comprising:
measuring a second voltage across two terminals of said second transistor at said single temperature; utilizing said second voltage and said first voltage to determine said resistance value.
7. A method in accordance with claim 6 , comprising:
forming said first and said second transistors as diode connected bipolar PNP transistors.
8. A method in accordance with claim 7 , comprising:
processing said substrate utilizing CMOS N-well process technology.
9. A method in accordance with claim 6 , comprising:
trimming said first trimmable resistance network to said resistance value.
10. A method in accordance with claim 9 , comprising:
utilizing said first and said second measured voltages to determine said resistance value from a table.
11. A method in accordance with claim 5 , comprising:
utilizing said first measured voltage to determine said resistance value from a table.