Method for processing data in a spread spectrum system

1. A method for processing data in a spread spectrum system, comprising:

decimating a data rate of received spread spectrum data by a decimation factor to a decimated rate;

storing the received spread spectrum data into a memory at the decimated rate; wherein the memory is a single port RAM and is divided into memory blocks, such that during processing a first subset of memory blocks is in a read mode and a second subset of memory blocks is in a write mode;

interpolating the decimated rate by an interpolation factor to an interpolated rate; and

reading the received spread spectrum data from the memory at the interpolated rate.

2. The method of claim 1 ,

wherein each of the memory blocks is divided into segments,

the method further comprising reading out data stored in each segment sequentially onto a bussing element accessible by multiple rake fingers.

3. The method of claim 1 , wherein the received spread spectrum data is read from the memory at the interpolated rate by selecting in-phase data and quadrature data.

4. A method for processing data, comprising:

providing a plurality of rake fingers;

providing a memory at the input to the plurality of rake fingers; and

providing a selector circuit positioned between the memory and each of the plurality of ralce fingers; and

accessing, by the plurality of rake fingers, the memory substantially simultaneously via a respective selector circuit, wherein the accessing comprises:

selecting, by a first plurality of multiplexers, in-phase data from the memory;

selecting, by a second plurality of multiplexers, quadrature data from the memory; and

controlling, by a set of select lines, data being selected by the first plurality of multiplexers and the second plurality of multiplexers.

5. The method of claim 4 , wherein the memory is a circular buffer comprising a plurality of registers.

6. The method of claim 4 , wherein the memory is a single-port RAM.

7. A method for processing data, comprising:

storing data in a memory located at an input to a plurality of rake fingers; and

accessing the memory substantially simultaneously by the plurality of rake fingers,

wherein the memory is divided into memory blocks such that, during each processing cycle, a first subset of the memory blocks is in a read mode and a second subset of the memory blocks is in a write mode.

8. The method of claim 7 ,

wherein each of the memory blocks is divided into segments,

the method further comprising reading out the data stored in each segment sequentially.

9. A method for processing data in a spread spectrum system, comprising:

providing a decimation circuit having an associated decimation factor;

providing a memory, which is a single port RAM, coupled to the decimation circuit, wherein the memory is divided into memory blocks such that during processing a first subset of memory blocks is in a read mode and a second subset of memory blocks is in a write mode; and

providing an interpolation circuit coupled to the memory, the interpolation circuit having an associated interpolation factor;

decimating, by the decimation circuit, a data rate of received data by the decimation factor to a decimated rate;

storing the received data into the memory at the decimated rate; and

interpolating, by the interpolation circuit, the decimated rate by the interpolation factor to an interpolated rate; and

retrieving the received data from the memory at the interpolated rate.

10. A method for processing data in a spread spectrum system, comprising:

providing a memory coupled to a set of despreaders via a bus;

wherein each of the set of despreaders comprises:

a block multiplexer coupled to the bus;

a set of sample multiplexers coupled to the block multiplexer;

a cache coupled to the sample multiplexers; and

a rake finger coupled to the cache, and

accessing samples stored in the memory substantially simultaneously via the bus, by the set of despreaders.

11. The method of claim 10 , wherein the memory is divided into blocks such that during a processing cycle by a despreader, a first subset of the blocks is in a read mode and a second subset of the blocks is in a write mode.

12. The method of claim 11 ,

wherein the blocks are divided into segments,

the method further comprising reading out sequentially, onto a bussing element coupled to the bus, samples stored in each of the segments.

13. The method of claim 12 , further comprising selecting samples from one bussing element, by the block multiplexer in each of the despreaders.

14. The method of claim 13 , wherein the selecting comprises the sample multiplexers in each of the despreaders selecting appropriate Early, On-Time, and Late samples among samples received from the block multiplexer to be stored into the cache.