Data coding with an efficient LDPC encoder

1. A method of coding data for transmission in a communication channel comprising:

generating a codeword from a mother code parity check matrix and a macro matrix, wherein the mother code parity check matrix comprises a (j*m)-by-(k*m) matrix and includes sub-matrices that are m-by-m square matrices with cyclic structure, and wherein the macro matrix comprises a j-by-k matrix and includes elements that represent nonzero sub-matrices of the mother code parity check matrix.

2. The method of claim 1 , wherein the codeword is an LDPC coded message having a plurality of data bits and a plurality of parity bits.

3. The method of claim 2 , wherein the LDPC coded message includes 972 data bits and 972 parity bits.

4. The method of claim 1 , wherein the mother code parity check matrix comprises a lower triangular macro matrix, and wherein the mother code parity check matrix allows predefined row combining so that no doubly-diagonal sub-matrix is formed except the lower-right staircase sub-matrix.

5. The method of claim 1 , wherein the mother code parity matrix comprises a 972-by-1944 matrix, where m is 27, and the macro matrix comprises a 36-by-72 matrix for a rate ½ code.

6. The method of claim 5 , wherein the rate ½ code is selectively varied to at least one of a rate ⅔ code, a rate ¾ code, and a rate ⅚ code by applying a row-combining technique to the mother code parity check matrix, wherein a rate ⅔ code results from combing the rows 1 - 12 with rows 19 - 30 , the rate ¾ code results from combining rows 1 - 18 with rows 19 - 36 , and the rate ⅚ code results from combining rows 1 - 12 , rows 13 - 24 , and rows 25 - 36 together.

7. The method of claim 1 , wherein the mother code parity check matrix defines a constraint such that no bi-diagonal sub-matrices exist.

8. The method of claim 1 , wherein the mother code parity check matrix allows column grouping, which refers to a column degree or the number of 1's in a column.

9. The method of claim 1 , wherein the mother code parity check matrix avoids lengths of four cycles.

10. The method of claim 1 , wherein the method is applied to the IEEE 802.11n MIMO standard.

11. An LDPC encoder for encoding data for transmission through a communications channel, comprising:

means for generating a codeword from a mother code parity check matrix and a macro matrix, wherein the mother code parity check matrix comprises a (j*m)-by-(k*m) matrix and includes sub-matrices that are m-by-m square matrices with cyclic structure, and wherein the macro matrix comprises a j-by-k matrix and includes elements that represent nonzero sub-matrices of the mother code parity check matrix.

12. The LDPC encoder of claim 11 , wherein the codeword is an LDPC coded message having a plurality of data bits and a plurality of parity bits.

13. The LDPC encoder of claim 12 , wherein the LDPC coded message includes 972 data bits and 972 parity bits.

14. The LDPC encoder of claim 11 , wherein the mother code parity check matrix comprises a lower triangular matrix with at least one 1 in each row, and wherein the mother code parity check matrix allows row combining so that no two 1's are combined.

15. The LDPC encoder of claim 11 , wherein the mother code parity matrix comprises a 972-by-1944 matrix, where m is 27, and the macro matrix comprises a 36-by-72 matrix for a rate ½ code.

16. The LDPC encoder of claim 11 , wherein the rate ½ code is selectively varied to at least one of a rate ⅔ code, a rate ¾ code, and a rate ⅚ code by applying a row-combining technique to the mother code parity check matrix, wherein a rate ⅓ code results from combing the rows 1 - 12 with rows 19 - 30 , the rate ¾ code results from combining rows 1 - 18 with rows 19 - 36 , and the rate ⅚ code results from combining rows 1 - 12 , rows 13 - 24 , and rows 25 - 36 together.

17. A communications system comprising:

an LDPC encoder for encoding data for transmission through a communications channel, wherein the encoder generates a codeword from a mother code parity check matrix and a macro matrix, wherein the mother code parity check matrix comprises a (j*m)-by-(k*m) matrix and includes sub-matrices that are m-by-m square matrices with cyclic structure, and wherein the macro matrix comprises a j-by-k matrix and includes elements that represent nonzero sub-matrices of the mother code parity check matrix; and

an LDPC iterative decoder for decoding the encoded data received through the communications channel in accordance with a predetermined LDPC error detection structure.

18. The communications system of claim 17 , and further comprising:

a mapper and a modulator for mapping and modulating the encoded data before transmission through the communications channel; and

a demapper and demodulator for demapping and demodulating the encoded data received through the communications channel.