Transimpedance (TIA) circuit usable for burst mode communications
View Patent ↗A transimpedance amplifier (TIA) circuit usable for burst mode communications is provided. The TIA circuit includes a TIA stage, a limiter-amplifier, and a DC restoration loop. The invention overcomes problems of the prior art relating to burst communications, such as a DC level in the output signal which can change from burst to burst and a duty-cycle distortion in large signals. This is achieved by using a DC restoration loop that ensures achieving zero DC potential within variable acquisition periods.
1. A burst-mode transimpedance amplifier (TIA) circuit, comprising:
a TIA stage;
a limiter-amplifier having a first input coupled to said TIA stage, a second input coupled to a direct current (DC) restoration loon and two differential outputs coupled to said direct current (DC) restoration loop, wherein said differential outputs are also outputs of said burst-mode TIA circuit; and
a DC restoration loop coupled between the differential outputs and the second input of said limiter-amplifier and being configured to perform DC cancellation within variable acquisition periods, wherein the DC cancellation ensures substantially zero DC potential difference between said differential outputs;
wherein said DC restoration loop comprises:
an integrator having inverting and non-inverting inputs coupled to said differential outputs and an output port;
a resistor coupled to the output port of said integrator;
a switch switchably coupled across said resistor; and
a capacitor having a first end coupled to a common junction of said switch and said resistor and having a second end connected to ground.
2. The circuit of claim 1 , wherein the circuit is part of an optical receiver that comprises an optical detector coupled to an input of said TIA stage.
3. The circuit of claim 1 , wherein said limiter-amplifier is capable of producing limited differential voltage signals.
4. The circuit of claim 1 , wherein the switch is configured to vary acquisition periods according to whether said switch is open or closed.
5. The circuit of claim 4 , wherein closing said switch allows for a fast acquisition.
6. The circuit of claim 5 , wherein said switch is adapted to remain closed for a preconfigured time interval every time that the photo current signal rises.
7. The circuit of claim 4 , wherein opening said switch allows for a slow acquisition.
8. The circuit of claim 1 , wherein said integrator is adapted to measure a DC difference between the differential outputs.
9. The circuit of claim 8 , wherein said capacitor is charged to the DC difference.
10. A burst-mode transimpedance amplifier (TIA) circuit, comprising:
a TIA stage;
a limiter-amplifier having a first input coupled to said TIA stage and a second input coupled to a first reference voltage;
a DC restoration loop having two differential outputs coupled to respective outputs of said limiter-amplifier and two inputs connected to said limiter-amplifier, wherein said DC restoration loop is capable of performing at least DC cancellation within variable acquisition periods, wherein the DC cancellation ensures substantially zero DC potential difference between said differential outputs;
wherein said DC restoration loop, comprises:
a first integrator having an inverting input coupled to a second reference voltage and a positive input port coupled to said limiter-amplifier;
a second integrator having a non-inverting input coupled to a feedback net and a negative input port coupled to said limiter-amplifier;
a third integrator having a non-inverting input coupled to an output of said first integrator and an inverting input coupled to an output of said second integrator;
a resistor coupled to the output of said third integrator and to a first end of a capacitor coupled at opposite end to GND; and
a switch switchably coupled across said resistor;
wherein said capacitor, said switch and said resistor form said feedback net.
11. The circuit of claim 10 , wherein the circuit is part of an optical receiver that comprises an optical detector coupled to an input of said TIA stage.
12. The circuit of claim 10 , wherein said limiter-amplifier is capable of producing differential voltage signals, wherein the voltage signals are limited by the first reference voltage.
13. The circuit of claim 10 , wherein the variable acquisition periods are achieved by switching said switch.
14. The circuit of claim 13 , wherein closing said switch allows for a fast acquisition.
15. The circuit of claim 14 , wherein said switch is closed, for a preconfigured time interval, every time that the photo current signal rises.
16. The circuit of claim 13 , wherein opening said switch allows for a slow acquisition.
17. The circuit of claim 10 , wherein said third integrator measures a DC difference between the differential outputs.
18. The circuit of claim 17 , wherein said capacitor is charged to the measured DC difference.
19. The circuit of claim 10 , wherein the second reference voltage is set to an average of peak and deep amplitudes of said optical detector.
20. The circuit of claim 10 , wherein said burst-mode TIA circuit is operative in at least an optical line terminal (OLT) of a passive optical network (PON).
21. A burst-mode transimpedance amplifier (TIA) circuit, comprising:
a TIA stage;
a limiter-amplifier having a first input coupled to said TIA stage, a second input coupled to a first reference voltage and two differential outputs connected to a direct current (DC) restoration loop, wherein the differential outputs are also outputs of said burst-mode TIA circuit; and
a DC restoration loop coupled to said differential outputs and being configured to perform DC cancellation within variable acquisition periods, wherein performing said DC cancellation ensures substantially zero DC potential difference between said differential outputs;
wherein said DC restoration loop comprises:
an integrator having an inverting input and a non-inverting output coupled to a first feedback loop and a non-inverting input and invert output coupled to a second feedback loop, wherein the integrator is further coupled to a second reference voltage;
a first feedback loop including a first resistor coupled between the non-inverting output and a first one of the differential outputs, a second resistor coupled between the inverting input and the first differential output, a first switch switchably coupled across said second resistor and a first capacitor connected between the inverting input and the non-inverting output; and
a second feedback loop including a third resistor coupled between the inverting output and a second one of the differential outputs, a fourth resistor coupled between the non-inverting input and the second differential output, a second switch switchably coupled across said fourth resistor and a second capacitor connected between the non-inverting input and the inverting output.
22. The circuit of claim 21 , wherein the circuit is part of an optical receiver that comprises an optical detector coupled to an input of said TIA stage.
23. The circuit of claim 21 , wherein said limiter-amplifier is capable of producing differential voltage signals, wherein the voltage signals are limited by the first reference voltage.
24. The circuit of claim 21 , wherein the variable acquisition periods are achieved by switching said first switch and said second switch.
25. The circuit of claim 24 , wherein closing said first switch and said second switch allows for a fast acquisition.
26. The circuit of claim 25 , wherein said first switch and said second switch remain closed for a preconfigured time interval, every time that the photo current signal rises.
27. The circuit of claim 24 , wherein opening said first switch and said second switch allows for a slow acquisition.
28. The circuit of claim 27 , wherein said integrator measures a DC difference between the differential outputs.
29. The circuit of claim 28 , wherein said first capacitor and said second capacitor are charged to the measured DC difference.
30. The circuit of claim 29 , wherein charging said first capacitor decreases the voltage level of a negative output voltage signal.
31. The circuit of claim 29 , wherein charging said second capacitor increases the voltage level of a positive output voltage signal.
32. The circuit of claim 21 , wherein said burst-mode TIA circuit is operative in an optical line terminal (OLT) of a passive optical network (PON).