Method of forming fine pattern, liquid crystal display device having a fine pattern and fabricating method thereof

1. A method of forming a fine pattern, comprising:

providing a film;

forming a photo-resist pattern on the film;

ashing the photo-resist pattern, wherein the ashing process is performed under O 2 and at least one of SF 6 and CF 4 gas environment; and

patterning the film by using the ashed photo-resist pattern as a mask.

2. The method as claimed in claim 1 , wherein the photo-resist pattern has a step pattern.

3. The method as claimed in claim 1 , wherein the photo-resist pattern includes a first region and a second region having a thickness thinner than the first region.

4. The method as claimed in claim 1 , wherein the ashing the photo-resist pattern includes reducing a line width and a thickness of the first region, and removing the second region.

5. The method as claimed in claim 4 , wherein the line width of the ashed first region includes a uniform width by removing the second region of the photo-resist pattern and adjusting a condition of the ashing process.

6. The method as claimed in claim 1 , wherein the forming the photo-resist pattern includes an exposing process adjusting an exposure time such that the photo-resist pattern remains in an exposed area.

7. The method as claimed in claim 1 , wherein the photo-resist pattern includes a step region and a flat region.

8. The method as claimed in claim 7 , wherein the step region is shielded during the exposing process and the flat region is exposed during the exposure process.

9. The method as claimed in claim 1 , wherein the ashing process is performed by using plasma.

10. The method as claimed in claim 1 , wherein the fine pattern has a line width of approximately 0.5˜2 μm.

11. A method of forming a fine pattern, comprising:

forming a photo-resist pattern using a mask to form a first pattern having a first line width corresponding to an exposure resolution of the mask;

ashing the photo-resist pattern to have a second pattern with a second line width narrower than the first line width, wherein the ashing process is performed by O 2 and at least one of SF 6 and CF 4 gas environment; and

patterning a film by using the ashed photo-resist pattern as a mask to form a third pattern with a third line width narrower than the second line width.

12. The method as claimed in claim 11 , wherein the photo-resist pattern has a step pattern.

13. The method as claimed in claim 11 , wherein the photo-resist pattern includes a first region and a second region having a thickness thinner than the first region.

14. The method as claimed in claim 13 , wherein ashing the photo-resist pattern includes reducing a line width and a thickness of the first region, and removing the second region.

15. The method as claimed in claim 13 , wherein the line width of the ashed first region includes a uniform width by removing the second region of the photo-resist pattern and adjusting a condition of the ashing process.

16. The method as claimed in claim 11 , wherein the forming the photo-resist pattern includes an exposing process adjusting an exposure time such that the photo-resist pattern remains in an exposed area.

17. The method as claimed in claim 11 , wherein the photo-resist pattern includes a step region and a flat region.

18. The method as claimed in claim 17 , wherein the step region is shielded during the exposing process and the flat region is exposed during the exposure process.

19. The method as claimed in claim 11 , wherein the ashing process is performed by using plasma.

20. The method as claimed in claim 11 , wherein the fine pattern has a line width of approximately 0.5˜2 μm.

21. A method of fabricating at least one portion of the pixel electrode and the common electrode on a substrate for a liquid crystal display device comprising:

forming a conductive layer;

forming a photo-resist pattern using a mask to form a first pattern having a first line width corresponding to an exposure resolution of the mask;

ashing the photo-resist pattern, wherein the ashing process is performed under O 2 and at least one of SF 6 and CF 4 gas environment; and

patterning the conductive layer using the ashed photo-resist pattern as a mask to form the one portion having a second line width narrower than the first line width.

22. The method as claimed in claim 21 , wherein the photo-resist pattern has a step pattern.

23. The method as claimed in claim 21 , wherein the photo-resist pattern includes a first region and a second region having a thickness thinner than the first region.

24. The method as claimed in claim 23 , wherein ashing the photo-resist pattern includes reducing a line width and a thickness of the first region, and removing the second region.

25. The method as claimed in claim 24 , wherein the line width of the ashed first region includes a uniform width by removing the second region of the photo-resist pattern and adjusting a condition of the ashing process.

26. The method as claimed in claim 21 , wherein the forming the photo-resist pattern includes an exposing process adjusting an exposure time such that the photo-resist pattern remains in an exposed area.

27. The method as claimed in claim 21 , wherein the photo-resist pattern includes a step region and a flat region.

28. The method as claimed in claim 27 , wherein the step region is shielded during the exposing process the flat region is exposed during the exposure process.

29. The method as claimed in claim 21 , wherein the ashing process is performed by using plasma.

30. The method as claimed in claim 21 , wherein the one portion has a line width of approximately 0.5˜2 μm.

31. The method as claimed in claim 21 , wherein the one portion has a line width of approximately 1 μm.

32. The method as claimed in claim 21 , wherein the one portion is a finger portion of the at least electrode.