Method for fabricating capacitor
View Patent ↗A method for fabricating a capacitor includes: forming a storage node contact plug over a substrate; forming an insulation layer having an opening exposing a surface of the storage node contact plug over the storage contact plug; forming a conductive layer for a storage node over the insulation layer and the exposed surface of the storage node contact plug through two steps performed at different temperatures; performing an isolation process to isolate parts of the conductive layer; and sequentially forming a dielectric layer and a plate electrode over the isolated conductive layer.
1. A method for fabricating a capacitor, comprising:
forming a storage node contact plug over a substrate;
forming an insulation layer having an opening exposing a surface of the storage node contact plug over the storage node contact plug;
forming a conductive layer including a lower layer and an upper layer over the insulation layer, side walls of the opening, and the exposed surface of the storage node contact plug, wherein forming the conductive layer comprises:
forming the lower layer by performing a low temperature atomic layer deposition (ALD) process, and
forming the upper layer on the lower layer by performing a high temperature process;
performing an isolation process to isolate the conductive layer for the storage node; and
sequentially forming a dielectric layer and a plate electrode over the isolated conductive layer for the storage node,
wherein the low temperature ALD process is performed at a temperature ranging from approximately 100° C. to approximately 250° C., and the high temperature process is performed at a temperature of approximately 300° C. and
wherein performing the high temperature process comprises using one of an ALD method and a combination of an ALD method and a chemical vapor deposition (CVD) method.
2. The method of claim 1 , after the performing of the isolation process, further comprising removing the insulation layer through a dip-out process.
3. The method of claim 1 , further comprising performing a plasma treatment when a reaction gas is flowed during one of the ALD method and the combination of the ALD method and the CVD method.
4. The method of claim 3 , wherein the plasma treatment is performed using a gas selected from a group consisting of oxygen (O 2 ), ammonia (NH 3 ), dyhydrogen oxide (H 2 O), hydrazine (N 2 H 4 ), Me 2 N 2 H 2 , hydrogen (H 2 ), and a combination thereof at a plasma power ranging from approximately 10 W to approximately 2,000 W, and a temperature ranging from approximately 200° C. to approximately 500° C.
5. The method of claim 1 , wherein forming the conductive layer comprises forming a first portion of the conductive layer in a thickness ranging from approximately 10 Å to approximately 50 Å during the low temperature process, and forming a second portion of the conductive layer in a thickness ranging from approximately 50 Å to approximately 150 Å in the high temperature process.
6. The method of claim 1 , wherein forming the conductive layer comprises performing one cycle to approximately one hundred cycles of the low temperature process.
7. The method of claim 1 , wherein forming the conductive layer comprises forming a layer of a material selected from a group consisting of ruthenium (Ru), platinum (Pt), Iridium (Ir), rhodium (Rh), palladium (Pd), hafnium (Hf), titanium (Ti), tungsten (W), tantalum (Ta), a nitrided film, and a conductive oxide layer.
8. The method of claim 1 , wherein forming the conductive layer comprises forming the storage node in a thickness ranging from approximately 100 Å to approximately 200 Å.