IP Library Granted Patent US 7,466,004
Granted Patent B2
US 7,466,004 · App. 11/455,343 · Granted Dec 16, 2008

Diode structure to suppress parasitic current

Assignee: Polar Semiconductor, Inc.
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Quick Facts
Patent No.
US 7,466,004
App. No.
11/455,343
Granted
Dec 16, 2008
Kind
B2
Abstract

A diode conducts current between an anode terminal and a cathode terminal. The diode includes a parasitic transistor formed between one of the terminals and the substrate. The diode also includes a second transistor that competes with the parasitic transistor to direct current flow between the anode terminal and the cathode terminal.

Claims (45)

1. A diode comprising:

a substrate of a first conductivity type;

an epitaxial region of a second conductivity type adjacent the substrate;

a first terminal;

a second terminal spaced from the first terminal;

a first region of the first conductivity type connected to the first terminal and the epitaxial region;

a second region of the first conductivity type connected to the second terminal and the epitaxial region; and

a third region of the second conductivity type connected to the second terminal and the epitaxial region.

2. The diode of claim 1 , further comprising a third terminal electrically connected to the substrate.

3. The diode of claim 1 , wherein the second region is located between the third region and the first region.

4. The diode of claim 1 , wherein the third region is located between the second region and the first region.

5. The diode of claim 1 , further comprising an electrically insulating region between the first region and the second region.

6. The diode of claim 1 , wherein each of the first region, the second region, the third region, and the second terminal form a ring around the first terminal.

7. The diode of claim 1 , wherein the second region comprises a plurality of regions of the first conductivity type.

8. The diode of claim 1 , wherein the third region comprises a plurality of regions of the second conductivity type.

9. A diode for conducting current between a first terminal and a second terminal, the diode comprising:

a substrate;

an epitaxial region of a first conductivity type adjacent the substrate;

a first doped region of a second conductivity type connected to the first terminal and the epitaxial region; and

means for passing, current from the epitaxial region to the second terminal to divert current from an undesired location.

10. The diode of claim 9 , wherein the means for passing current from the epitaxial region to the second terminal comprises a second doped region of the first conductivity type connected to the second terminal and the epitaxial region.

11. The diode of claim 9 , the means for passing current from the epitaxial region to the second terminal comprises a third doped region of the second conductivity type connected to the second terminal and the epitaxial region.

12. The diode of claim 9 , wherein the means for passing current from the epitaxial region to the second terminal comprises:

a second doped region of the first conductivity type connected to the second terminal and the epitaxial region; and

a third doped region of the second conductivity type connected to the second terminal and the epitaxial region.

13. The diode of claim 12 , wherein the second terminal comprises a metal layer connected to the second doped region and the third doped region.

14. A diode comprising:

a substrate of a first conductivity type;

an epitaxial region of a second conductivity type adjacent the substrate;

a first terminal adjacent the epitaxial region;

a second terminal adjacent the epitaxial region and spaced from the first terminal;

a first transistor comprising:

a first region of the first conductivity type;

the epitaxial region connected to the first region; and

the substrate connected to the epitaxial region;

a second transistor comprising:

the first region;

the epitaxial region connected to the first region; and

a second region of the first conductivity type, connected to the epitaxial region and the second terminal and spaced from the first region; and

a third region of the second conductivity type, connected to the epitaxial region and the second terminal.

15. The diode of claim 14 , wherein the first transistor and the second transistor are pnp transistors.

16. The diode of claim 14 , wherein a doping concentration of the third region is greater than a doping concentration of the epitaxial region.

17. The diode of claim 14 , further comprising a third terminal electrically connected to the substrate.

18. The diode of claim 14 , further comprising a buried layer between the substrate and the epitaxial region.

19. The diode of claim 14 , further comprising an electrically insulating region between the first region and the third region.

Assignments (3)
SECURITY AGREEMENT Recorded Oct 7, 2024
From: POLAR SEMICONDUCTOR, LLC
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 069114/0336 →
CHANGE OF NAME Recorded Jul 28, 2014
From: POLAR SEMICONDUCTOR, INC.
To: POLAR SEMICONDUCTOR, LLC
Reel/Frame 033421/0154 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 19, 2006
From: KOSIER, STEVEN L.; ELWOOD, DAVID M.
To: POLAR SEMICONDUCTOR, INC.
Reel/Frame 018009/0370 →
Continuity (1)
Related Publication 20070290289A1 · Dec 20, 2007