IP Library Granted Patent US 7,511,565
Granted Patent B2
US 7,511,565 · App. 11/455,376 · Granted Mar 31, 2009

Integrated circuit apparatus and method of compensating a current

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Quick Facts
Patent No.
US 7,511,565
App. No.
11/455,376
Granted
Mar 31, 2009
Kind
B2
Abstract

An integrated circuit comprises a gain stage circuit coupled to a compensation circuit. Both the gain stage circuit and the compensation circuit respectively comprise a first current source and a second current source that are subject to the same process variations. A negative feedback circuit is used to generate a corrective current in relation to the second current source, indicative of a current that needs to flow through a load in addition to a current flowing through the second current source in order for a variable voltage to be substantially equal to a reference voltage used to drive the first and second current sources. A compensating current corresponding to the corrective current generated for the second current source is applied to the first current source to compensate for process variation in the gain stage circuit in respect to the first current source.

Claims (14)

1. An integrated circuit apparatus, the apparatus comprising:

a first integrated circuit comprising a first current source requiring compensation; and

a compensation circuit comprising:

a feedback control loop arranged, when in use, to receive a variable voltage and a reference voltage and generate a corrective current in response to a difference between the variable voltage and the reference voltage;

a voltage generation circuit comprising a second current source and arranged, when in use, to receive the corrective current and combine the corrective current with a current flowing through the second current source in order to generate the variable voltage, the variable voltage being substantially equal to the reference voltage when the current flowing through the second current source is in accordance with at least one design expectation of the second current source; wherein

the second current source is the same as the first current source, the first and second current sources having been formed by substantially common process parameters; and

the first current source is coupled to the compensation circuit in order to receive a compensation current corresponding to the corrective current.

2. An apparatus as claimed in claim 1 , wherein the first and second current sources are biased by the reference voltage.

3. An apparatus as claimed in claim 1 , wherein the first and second current sources each comprise a common structure.

4. An apparatus as claimed in claim 1 , wherein the first and second current sources each comprises at least one semiconductor device, the at least one semiconductor device of the first current source respectively having a same structure as the at least one semiconductor device of the second current source.

5. An apparatus as claimed in claim 1 , wherein the voltage generation circuit further comprises a load, the load being coupled to the second current source so that a voltage drop, when in use, across the load results in the generation of the variable voltage.

6. An apparatus as claimed in claim 1 , wherein the feedback control loop comprises a voltage to current converter circuit arranged to generate the corrective current.

7. An apparatus as claimed in claim 6 , wherein the voltage to current converter circuit comprises a pair of transistors of opposite type, with control terminals of the pair of transistors being coupled together.

8. An apparatus as claimed in claim 1 , wherein the first current source is coupled to a cascode transistor.

Assignments (9)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 14, 2020
From: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
To: BROADCOM INTERNATIONAL PTE. LTD.
Reel/Frame 053771/0901 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF MERGER PREVIOUSLY RECORDED AT REEL: 047195 FRAME: 0827. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Nov 5, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047924/0571 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047195/0827 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032851-0001) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 037689/0001 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032851/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 8, 2007
From: AGILENT TECHNOLOGIES, INC.
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 019401/0251 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 16, 2006
From: SEIFU, FESSEHA TESSERA; FORNASARI, MARCO; ABOULHOUDA, SAMIR
To: AGILENT TECHNOLOGIES, INC.
Reel/Frame 018430/0252 →