IP Library Granted Patent US 7,388,535
Granted Patent B1
US 7,388,535 · App. 11/458,737 · Granted Jun 17, 2008

Digitizing front end for optical receiver

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Quick Facts
Patent No.
US 7,388,535
App. No.
11/458,737
Granted
Jun 17, 2008
Kind
B1
Abstract

A sampled-data-integrating front end is employed to convert an optical signal to a digital electrical signal. The front end includes a photodetector and an array of parallel conversion circuits, each including an activation switch, a charge amplifier and an Analog to Digital Converter (“ADC”). The charge amplifier includes a reset switch, a capacitor, and an amplifier. The resent switch is operable to discharge the capacitor. The capacitor is operable to charge to the voltage of a signal charge when the activation switch is closed, and to hold that voltage after the activation switch is opened. The amplifier is operable to provide current at the voltage across the capacitor for a period sufficient to enable the ADC to obtain an accurate sample. The parallel conversion circuits are time-interleaved to provide a selected resolution in the digital electrical representation of the optical signal.

Claims (22)

1. Apparatus operable to convert an optical signal to a digital electrical signal comprising:

at least one photodetector;

a plurality of parallel conversion circuits interconnectable with the photodetector, each conversion circuit including first switch means for selectively placing the conversion circuit in communication with the photodetector, a charge amplifier operable to produce a voltage corresponding to a signal charge from the photodetector, and an analog to digital converter operable in response to produce a digital electrical representation of the optical signal; and

a clock operable to time-interleave the conversion circuits by activating the respective first switch means, one at a time, to selectively place each respective conversion circuit in communication with the photodetector once per cycle.

2. The apparatus of claim 1 wherein each conversion circuit further includes an automatic gain control amplifier connected between the charge amplifier and the analog to digital converter.

3. The apparatus of claim 1 wherein each conversion circuit includes a capacitor operable to charge to the level of the signal charge.

4. The apparatus of claim 3 wherein each conversion circuit includes second, reset switch means operable when activated to discharge the capacitor.

5. The apparatus of claim 4 wherein each conversion circuit includes an amplifier operable to provide a signal at the voltage of the capacitor.

6. The apparatus of claim 4 wherein the clock is further operable to activate the respective second, reset switch means to reset the capacitor prior to activating the first switch means to selectively place each respective conversion circuit in communication with the photodetector.

7. The apparatus of claim 6 wherein the clock is further operable, in a cycle, to activate the first switch means, then to deactivate the first switch means following a predetermined period of time, then activate an analog to digital converter input after a predetermined settling time, then deactivate the analog to digital converter input, and then activate the second, reset switch means.

8. A method of converting an optical signal to a digital electrical signal comprising the steps of:

producing a signal charge from an optical signal with at least one photodetector; and

with one of a plurality of parallel conversion circuits interconnectable with the photodetector:

selectively placing the conversion circuit in communication with the photodetector using first switch means with a clock, including time-interleaving the conversion circuits by activating the respective first switch means, one at a time, to selectively place each respective conversion circuit in communication with the photodetector once per cycle,

producing a voltage corresponding to a signal charge from the photodetector using a charge amplifier, and

producing a digital electrical representation of the optical signal using an analog to digital converter.

9. The method of claim 8 including the further step of, with the conversion circuit, amplifying a signal from the charge amplifier using an automatic gain control amplifier connected between the charge amplifier and the analog to digital converter.

10. The method of claim 8 including the further step of, with the conversion circuit, charging a capacitor to the level of the signal charge.

11. The method of claim 10 including the further step of, with the conversion circuit, discharging the capacitor with a second, reset switch means.

12. The method of claim 11 including the further step of, with the conversion circuit, providing a signal at the voltage of the capacitor using an amplifier.

13. The method of claim 11 including the further step of, with the clock, activating the respective second, reset switch means to reset the capacitor prior to activating the first switch means to selectively place each respective conversion circuit in communication with the photodetector.

14. The method of claim 13 including the further steps of, with the clock in a cycle of the conversion circuit, activating the first switch means, then deactivating the first switch means following a predetermined period of time, then activating an analog to digital converter input after a predetermined settling time, then deactivating the analog to digital converter input, and then activating the second, reset switch means.

Assignments (8)
RELEASE OF SECURITY INTEREST Recorded Nov 20, 2023
From: BANK OF AMERICA, N.A.
To: CIENA CORPORATION
Reel/Frame 065630/0232 →
PATENT SECURITY AGREEMENT Recorded Nov 8, 2019
From: CIENA CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 050969/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 30, 2019
From: DEUTSCHE BANK AG NEW YORK BRANCH
To: CIENA CORPORATION
Reel/Frame 050938/0389 →
PATENT SECURITY AGREEMENT Recorded Jul 16, 2014
From: CIENA CORPORATION
To: BANK OF AMERICA, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 033347/0260 →
SECURITY INTEREST Recorded Jul 15, 2014
From: CIENA CORPORATION
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 033329/0417 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 19, 2010
From: CIENA LUXEMBOURG S.A.R.L.
To: CIENA CORPORATION
Reel/Frame 024252/0060 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 9, 2010
From: NORTEL NETWORKS LIMITED
To: CIENA LUXEMBOURG S.A.R.L.
Reel/Frame 024213/0653 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 20, 2006
From: SITCH, JOHN
To: NORTEL NETWORKS LIMITED
Reel/Frame 017965/0801 →