IP Library Granted Patent US 7,880,811
Granted Patent B2
US 7,880,811 · App. 11/460,656 · Granted Feb 1, 2011

Signal seperation circuit and signal transmission circuit

Assignee: Fujitsu Limited
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Quick Facts
Patent No.
US 7,880,811
App. No.
11/460,656
Granted
Feb 1, 2011
Kind
B2
Abstract

In a signal separation circuit for separating a plurality of pulse signals received via the same signal line, a PC-on signal detection circuit detects a PC-on signal with a first pulse width from a PC/TV-on signal received via the signal line and generates a first corresponding output signal. A TV-on signal detection circuit detects a TV-on signal with a second pulse width shorter than the first pulse width from the PC/TV-on signal and generates a second corresponding output signal.

Claims (14)

1. A signal separation circuit separating a plurality of pulse signals received via the same signal line, the signal separation circuit comprising:

a first circuit detecting a first pulse signal with a first pulse width from a signal received via the signal line to generate a first output signal corresponding to the first pulse signal;

a second circuit detecting a second pulse signal with a second pulse width shorter than the first pulse width from the received signal; and

a third circuit generating a second output signal from the first output signal and an output signal of the second circuit, wherein

the first circuit comprises

a first integration circuit which is charged beyond a first threshold voltage by the first pulse signal and is not charged up to the first threshold voltage by the second pulse signal; and

a first output circuit generating the first output signal when the first integration circuit is charged beyond the first threshold voltage, the second circuit comprises

a second integration circuit which is charged beyond a second threshold by the second pulse signal and

the third circuit comprises

a second output circuit generating the second output signal when the first circuit does not generate the first output signal in an end edge timing of the input pulse signal which contributes to the charge of the second integration circuit after the second integration circuit is charged beyond the second threshold voltage.

2. The signal separation circuit according to claim 1 , wherein

the second output circuit is comprised of an AND circuit to which the output signal of the first integration circuit, the output signal of the second integration circuit and the received signal are inputted.

3. The signal separation circuit according to claim 1 , wherein

the first pulse signal is an activation signal activating one of a personal computer and a television receiver, and the second pulse signal is another activation signal activating the other of the personal computer and television receiver.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 31, 2019
From: FUJITSU LIMITED
To: FUJITSU CLIENT COMPUTING LIMITED
Reel/Frame 048750/0910 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 28, 2006
From: TAKAHASHI, KAZUNORI
To: FUJITSU LIMITED
Reel/Frame 018136/0533 →
Priority Claims (1)
JP 2005-250638 · Aug 31, 2005 · national
Continuity (1)
Related Publication 20070046814A1 · Mar 1, 2007