IP Library Granted Patent US 7,555,592
Granted Patent B1
US 7,555,592 · App. 11/463,339 · Granted Jun 30, 2009

Kernel acceleration technology for virtual machine optimization

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Quick Facts
Patent No.
US 7,555,592
App. No.
11/463,339
Granted
Jun 30, 2009
Kind
B1
Abstract

A system, method and computer program product for optimizing handling of guest code in a Virtual Machine include code for identifying, in the guest code, a predetermined pattern that includes privileged but unsafe instructions and an instruction that raises an exception; code for executing the guest code in a native mode; code for, upon encountering the instruction that raise the exception, transferring control to a Virtual Machine Monitor; code for emulating the pattern in the Virtual Machine Monitor; and code for rolling back the effects of privileged but unsafe instructions and any intervening instructions to ensure correct Virtual Machine Monitor context. The pattern can include, for example, a privileged but unsafe instruction, followed by safe instructions, followed by an exception raising instruction, followed by safe instructions, followed by a privileged but unsafe instruction. Optionally, the most frequently occurring patterns can be placed in a cache, for use by the Virtual Machine Monitor to verify their presence in the guest code.

Claims (42)

1. A method for optimizing handling of guest code in a Virtual Machine, comprising:

identifying, in the guest code, a predetermined pattern that includes unsafe instructions and an instruction that causes an event;

executing the guest code in a native mode;

upon encountering the instruction that raises an exception, transferring control to a Virtual Machine Monitor;

in the Virtual Machine Monitor, detecting the pattern; and

rolling back effects of privileged but unsafe instructions and any intervening instructions to ensure correct guest OS (Operating System) code context.

2. The method of claim 1 , wherein the pattern includes a privileged but unsafe instruction, followed by safe instructions, followed by an exception raising instruction, followed by safe instructions, followed by a privileged but unsafe instruction.

3. The method of claim 1 , further comprising placing most frequently occurring patterns in a cache, for use by the Virtual Machine Monitor to verify pattern presence in the guest code.

4. The method of claim 1 , wherein the event is any of an exception, a software interrupt, and a break in the guest code native execution.

5. A method for optimizing handling of guest code in a Virtual Machine, comprising:

analyzing guest code to detect recurring patterns that include privileged but unsafe instructions and instructions that raise exceptions;

replacing privileged but unsafe instructions that are outside the patterns with breakpoints that raise exceptions;

associating each pattern with a handler in a Virtual Machine Monitor such that the handler

emulates the instructions in the patterns that raise the exceptions; and

rolls back effects of execution of any prior privileged but unsafe instruction that was executed in Virtual Machine context.

6. The method of claim 5 , further comprising inserting instructions that raise exceptions into the analyzed code, near privileged but unsafe instructions that otherwise do not have, in their neighborhood, an instruction that raises an exception.

7. The method of claim 6 , further comprising setting the Virtual Machine Monitor to treat at least one instruction that otherwise does not raise exceptions as one that raises an exception.

8. The method of claim 5 , wherein the replaced instructions are emulated.

9. The method of claim 5 , wherein the replaced instructions are rolled back.

10. The method of claim 9 , wherein the replaced instructions are prior to the pattern.

11. A method for optimizing handling of guest code in a Virtual Machine, comprising:

generating a list of predetermined patterns that includes code sequences containing executable but unsafe instructions and an instruction that raises an exception;

executing the guest code in a native mode;

upon encountering the instruction that raises the exception, transferring control to a Virtual Machine Monitor;

in the Virtual Machine Monitor, identifying whether the instruction that raises the exception belongs to one of the patterns;

executing, in the Virtual Machine Monoitor, bypassing code sequences that have the same effect as the pattern; and

rolling back effects of the unsafe instructions and any intervening instructions to ensure a correct Virtual Machine context.

12. The method of claim 11 , further comprises replacing, in the guest code, unsafe instructions with instructions that raise exceptions.

13. The method of claim 11 , wherein the instructions that raise exceptions is followed by the unsafe instructions.

14. A method for optimizing handling of guest code in a Virtual Machine, comprising:

analyzing guest code to detect patterns that include privileged but unsafe instructions;

associating each pattern with a corresponding instruction that is defined to raise an exception;

associating each pattern with a handler in a Virtual Machine Monitor such that the handler:

emulates the instructions that raise the exceptions, and

rolls back effects of execution of any prior privileged but unsafe instruction that was executed in Virtual Machine context; and

upon reaching a portion of guest code that does not contain any patterns, un-defining the corresponding instruction from raising an exception.

15. A computer useable storage medium having computer program logic recorded thereon for executing on a processor for handling transfers of control in a Virtual Machine, the computer program logic comprising:

computer program code for identifying, in the guest code, a predetermined pattern that includes privileged but unsafe instructions and an instruction that raises an exception;

computer program code for executing the guest code in a native mode;

computer program code for, upon encountering the instruction that raise the exception, transferring control to a Virtual Machine Monitor;

in the Virtual Machine Monitor, computer program code for emulating the pattern; and

computer program code for rolling back effects of privileged but unsafe instructions and any intervening instructions to ensure correct Virtual Machine Monitor context.

Assignments (4)
RELEASE OF SECURITY INTEREST Recorded Jul 18, 2019
From: UBS AG, STAMFORD BRANCH, AS ADMINISTRATIVE AND COLLATERAL AGENT
To: COREL CORPORATION; CLEARSLIDE, INC.; PARALLELS INTERNATIONAL GMBH
Reel/Frame 049787/0073 →
RELEASE OF SECURITY INTEREST RECORDED AT : REEL 047973 FRAME 0797 Recorded Jul 17, 2019
From: UBS AG, STAMFORD BRANCH
To: PARALLELS INTERNATIONAL GMBH
Reel/Frame 049773/0590 →
SECURITY INTEREST Recorded Dec 21, 2018
From: PARALLELS INTERNATIONAL GMBH
To: UBS AG, STAMFORD BRANCH
Reel/Frame 047973/0797 →
MERGER Recorded Mar 6, 2018
From: PARALLELS IP HOLDINGS GMBH
To: PARALLELS INTERNATIONAL GMBH
Reel/Frame 045122/0592 →