IP Library Granted Patent US 7,781,348
Granted Patent B2
US 7,781,348 · App. 11/463,983 · Granted Aug 24, 2010

Method of forming an organic light-emitting display with black matrix

Assignee: AU Optronics Corp.
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Quick Facts
Patent No.
US 7,781,348
App. No.
11/463,983
Granted
Aug 24, 2010
Kind
B2
Abstract

A method of forming an organic light-emitting display (OLED) includes the steps of providing a substrate, forming a black matrix on the substrate, forming a buffer layer on the black matrix, forming an active layer on the buffer layer, simultaneously patterning the black matrix and the buffer layer, and forming a display electrode and a thin film transistor over the buffer layer.

Claims (93)

1. A method for forming an organic light-emitting display (OLED), comprising:

providing a substrate;

forming a black matrix on the substrate;

forming a buffer layer on the black matrix;

patterning the black matrix and the buffer layer simultaneously; and

forming a thin film transistor and a display electrode over the buffer layer.

2. The method of claim 1 , wherein patterning the black matrix and the buffer layer simultaneously is performed with an identical mask.

3. The method of claim 1 , wherein the step of forming a thin film transistor and a display electrode over the buffer layer comprises:

forming a semiconductor over the buffer layer;

depositing a gate oxide layer covering the semiconductor layer and the buffer layer;

forming a gate metal on the gate oxide layer above the semiconductor layer;

ion-implanting the semiconductor layer by using the gate metal as a mask to form a source and a drain in the semiconductor layer;

depositing an inter-layer dielectric on the gate metal and the gate oxide layer;

forming a plurality of via holes above the drain and source by etching the gate oxide layer and the inter-layer dielectric;

forming a metal layer covering the plurality of via holes;

forming a passivation layer on the metal layer and the inter-layer dielectric;

forming the display electrode on the passivation layer; and

forming a light-emitting diode on the display electrode.

4. The method of claim 3 , wherein the step of forming the metal layer comprises:

forming a first metal film on the substrate; and

etching the first metal film to form a first metal layer.

5. The method of claim 3 , wherein the step of forming the semiconductor layer further comprises:

depositing an amorphous thin film on the buffer layer;

recrystallizing the amorphous thin film as a poly crystalline thin film; and

etching the poly crystalline thin film to form the semiconductor layer.

6. The method of claim 3 , wherein the step of forming the gate metal further comprises:

forming a second metal thin film on the gate oxide layer; and

forming the gate metal by etching the second metal thin film.

7. The method of claim 3 , wherein the step of forming the display electrode further comprises:

forming an electrode hole on the metal layer by etching the passivation layer;

forming a transparent electric conductivity film on the passivation layer and the metal layer; and

forming the display electrode by etching the transparent electric conductivity film.

8. The method of claim 7 , wherein the transparent electric conductivity film is selected from the group consisting of an Inidium Tin Oxide (ITO) and an Indium Zinc Oxide (IZO).

9. A method for forming an organic light-emitting display, comprising:

providing a substrate;

forming a black matrix on the substrate;

forming a buffer layer on the black matrix;

forming a semiconductor layer on the buffer layer;

depositing a gate oxide layer covering the semiconductor layer and the buffer layer;

forming a gate metal on the gate oxide layer above the semiconductor layer;

ion-implanting the semiconductor layer by using the gate metal as a mask to form a source and a drain in the semiconductor layer;

depositing an inter-layer dielectric on the gate metal and the gate oxide layer;

forming a plurality of via holes above the drain and source by etching the gate oxide layer and the inter-layer dielectric;

forming a metal layer covering the plurality of via holes;

patterning the black matrix and the buffer layer simultaneously; and

forming a display electrode over the semiconductor layer.

10. The method of claim 9 , wherein simultaneously patterning the black matrix and the buffer layer is performed with an identical mask.

11. The method of claim 9 , wherein the step of forming a display electrode over the semiconductor layer comprises:

forming a passivation layer on the metal layer and the inter-layer dielectric; and

forming the display electrode on the passivation layer.

12. The method of claim 9 , wherein the step of forming the metal layer further comprises:

forming a first metal film on the substrate; and

etching the first metal film to form a first metal layer.

13. The method of claim 9 , wherein the step of forming the semiconductor layer further comprises:

depositing an amorphous thin film on the buffer layer;

recrystallizing the amorphous thin film as a poly crystalline thin film; and

etching the poly crystalline thin film to form the semiconductor layer.

14. The method of claim 9 , wherein the step of forming the gate metal further comprises:

forming a second metal thin film on the gate oxide layer; and

forming the gate metal by etching the second metal thin film.

15. The method of claim 9 , wherein the step of forming the display electrode further comprises:

forming an electrode hole on the metal layer by etching the passivation layer;

forming a transparent electric conductivity film on the passivation layer and the metal layer; and

forming the display electrode by etching the transparent electric conductivity film.

16. The method of claim 15 , wherein the transparent electric conductivity film is selected from the group consisting of an Indium Tin Oxide (ITO) and an Inidium Zinc Oxide (IZO).

17. A method for forming an organic light-emitting display, comprising:

providing a substrate;

forming a black matrix on the substrate;

forming a buffer layer on the black matrix;

forming a gate metal over the black matrix;

depositing a gate oxide layer covering the gate metal and the buffer layer;

forming a semiconductor layer on the gate oxide layer;

ion-implanting the semiconductor layer to form a source and a drain in the semiconductor layer;

patterning the gate oxide layer, the black matrix and the buffer layer simultaneously;

forming a metal layer on the semiconductor layer and the gate oxide layer;

forming a planarization layer on the metal layer and the gate oxide layer; and

forming the display electrode on the planarization layer.

18. The method of claim 17 , wherein patterning the gate oxide layer, the black matrix, and the buffer layer simultaneously, is performed with an identical mask.

19. The method of claim 17 , wherein the step of forming the metal layer further comprises:

forming a first metal film on the buffer layer; and

etching the first metal film to form the gate metal.

20. The method of claim 17 , wherein the step of forming the metal layer further comprises:

forming a second metal film on the substrate; and

etching the second metal film to form the metal layer.

21. The method of claim 17 , wherein the display electrode further comprises:

forming an electrode hole on the metal layer by etching the passivation layer;

forming a transparent electric conductivity film on the passivation layer and the metal layer; and

forming the display electrode by etching the transparent electric conductivity film.

22. The method of claim 21 , wherein the transparent electric conductivity film is selected from the group consisting of an Indium Tin Oxide (ITO) and an Inidium Zinc Oxide (IZO).

23. The method of claim 17 , wherein the step of forming the semiconductor layer further comprises:

depositing an amorphous thin film on the buffer layer;

recrystallizing the amorphous thin film as a poly crystalline thin film; and

etching the poly crystalline thin film to form the semiconductor layer.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 24, 2025
From: AUO CORPORATION
To: NEOLAYER LLC
Reel/Frame 072266/0941 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 11, 2006
From: LEE, HSIN-HUNG; SHIH, MING-CHANG
To: AU OPTRONICS CORP.
Reel/Frame 018095/0379 →
Priority Claims (1)
TW 95112086 A · Apr 6, 2006 · national
Continuity (1)
Related Publication 20070236141A1 · Oct 11, 2007