Single bit DAC with tristate driver
View Patent ↗A method for producing an analog output from a digital input is described. A digital pulse train is received having an average value which is proportional to a digital conversion value. The digital pulse train is driven at a periodic interval to produce a modulated tristate-gate output. The modulated tristate-gate output is averaged to produce an analog output. Optionally, the pulse train is also driven at an additional periodic interval having a duty cycle of more, or less, than less than 50%. The pulse train may also be driven steadily.
1. A method of producing an analog output from a received digital input, the method comprising:
receiving a digital pulse train having an average value which is proportional to a digital conversion value;
driving the pulse train at a periodic interval to produce a modulated tristate-gate output;
averaging the modulated tristate-gate output to produce an analog signal reflective of the digital conversion value; and
driving the pulse train at a second periodic interval, the second periodic interval having a duty cycle of less than 50% so that the modulated tristate-gate output is more often disabled than enabled.
2. The method of claim 1 wherein the driving the pulse train at a second periodic interval is in response to an indication to enter a low power operating mode.
3. The method of claim 1 wherein the driving the pulse train at a second periodic interval is in response to an indication to decrease the loop bandwidth of a feedback system in which the analog signal reflective of the digital conversion value is a control signal.
4. A method of producing an analog output from a received digital input, the method comprising:
receiving a digital pulse train having an average value which is proportional to a digital conversion value;
driving the pulse train at a periodic interval to produce a modulated tristate-gate output;
averaging the modulated tristate-gate output to produce an analog signal reflective of the digital conversion value; and
driving the pulse train at a third periodic interval, the third periodic interval having a duty cycle of greater than 50% so that the modulated tristate-gate output is more often enabled than disabled.
5. The method of claim 4 wherein the driving the pulse train at a second periodic interval is in response to an indication to increase the loop bandwidth of a feedback system in which the analog signal reflective of the digital conversion value is a control signal.
6. A method of producing an analog output from a received digital input, the method comprising:
receiving the digital input over a conversion period;
accumulating the digital input at each predetermined clock period during the conversion period;
outputting a carry value based on the accumulation;
selectively driving or tristating the carry value during the conversion period based on a state of a control signal to produce a modulated tristate-gate output signal; and
averaging the modulated tristate-gate output signal.
7. The method of claim 6 , wherein accumulating the digital input comprises summing the digital input with a previous accumulated value.
8. The method of claim 6 , wherein accumulating the digital input comprises calculating a modulo-2 N accumulation of an N-bit digital input.
9. The method of claim 6 , wherein selectively driving or tristating the carry value comprises selectively tristating the carry value during a portion of at least one predetermined clock period during the conversion period.
10. The method of claim 6 , wherein selectively driving or tristating the carry value comprises selectively tristating the carry value during a portion of each predetermined clock period during the conversion period.
11. An apparatus for producing an analog output from a received digital input, the apparatus comprising:
an accumulator configured to receive a digital input and output a pulse train having an average value proportional to a digital conversion value;
a driver coupled to the accumulator and configured to selectively tristate an output during a conversion period based in part on a state of a control signal to produce a modulated tristate-gate output signal; and
a filter coupled to the driver and configured to average the modulated tristate-gate output signal to produce the analog output.
12. The apparatus of claim 11 , wherein the digital input comprises an N-bit digital input and the accumulator is configured to perform a modulo-2 N accumulation on the digital input and output a carry output as the pulse train.
13. The apparatus of claim 11 , wherein the driver is configured to continuously drive the output when the control signal is in a first state.
14. The apparatus of claim 13 , wherein the driver is configured to periodically tristate the output when the control signal is in a second state, distinct from the first state.
15. The apparatus of claim 11 , wherein the driver is configured to have a high impedance output for approximately one-half the conversion period based on the state of the control signal.
16. The apparatus of claim 11 , wherein the driver is configured to have a high impedance output for greater than approximately one-half the conversion period based on the state of the control signal.