System and apparatus for power distribution for a semiconductor device
View Patent ↗Systems, methods and apparatuses for low noise power distribution networks for use with semiconductor devices are disclosed. Embodiments of these systems and methods provide a power distribution network comprising a set of individual power distribution networks, each of the individual power distribution networks operable to provide power to a corresponding functional block of the semiconductor device. These individual power distribution networks may be coupled through capacitors between the power supplies or grounds of each individual power distribution network, such that the individual power distribution networks are coupled in a manner operable to pass AC current between them.
1. An apparatus for delivering power to a semiconductor device, comprising:
a set of individual power distribution networks, each individual power distribution network comprising a power supply and one or more decoupling capacitors coupled between a power line of the individual power distribution network and a ground line of the individual power distribution network and wherein each of the individual power distribution networks is coupled in parallel to a corresponding functional block of the semiconductor device; and
one or more first bypass capacitors, wherein each of the set of individual power distribution networks is coupled to another of the set of individual power distribution networks by at least one of the one or more first bypass capacitors.
2. The apparatus of claim 1 , wherein each of the corresponding functional blocks comprises substantially similar logic.
3. The apparatus of claim 2 , wherein each of the functional blocks is a processor core.
4. The apparatus of claim 2 , wherein the one or more first bypass capacitors couples a power line of each individual power distribution network to a power line of the another individual power distribution network.
5. An system for delivering power to a semiconductor device, comprising:
a package comprising a semiconductor device having a set of functional blocks; a printed circuit board (PCB) coupled to the package;
a power source coupled to the printed circuit board;
a set of individual power distribution networks, each of the individual power distribution networks comprising a power supply and one or more decoupling capacitors coupled between a power line of the individual power distribution network and a ground line of the individual power distribution network and wherein each of the individual power distribution networks is coupled in parallel to a corresponding functional block and providing power from the power source to the corresponding functional block; and
one or more first bypass capacitors, wherein each of the set of individual power distribution networks is coupled to another of the set of individual power distribution networks by at least one of the one or more first bypass capacitors.
6. The system of claim 5 , wherein each of the set of individual power distribution networks comprises a portion of the PCB, a portion of the package and a portion of the semiconductor device.
7. The system of claim 6 , wherein each of the functional blocks are substantially identical processor cores.
8. The system of claim 6 , wherein the one or more first bypass capacitors are comprised by the package, the PCB or the semiconductor device.
9. The system of claim 8 , wherein the one or more first bypass capacitors couples a power line of each individual power distribution network to a power line of the another individual power distribution network.