Liquid crystal display and method for manufacturing the same

1. A liquid crystal display, comprising:

a substrate;

a gate line;

a data line;

a thin film transistor on the substrate, the thin film transistor including a gate electrode, a semiconductor layer, a source electrode, and a drain electrode;

a gate insulating layer disposed between the gate electrode and the semiconductor layer;

a passivation layer on the substrate and the thin film transistor;

a pixel electrode connected with the drain electrode through a contact hole in the passivation layer;

an outer common line surrounding a pixel and formed on the passivation layer; and

a common electrode connected to the outer common line,

wherein the outer common line is overlapped with the gate and date lines,

wherein the pixel electrode and the common electrode are coplanar on the passivation layer,

wherein the outer common line is coplanar with the pixel electrode and the common electrode,

wherein the outer common line is overlapped with the gate line, having the gate insulating layer and the passivation layer therebetween,

wherein the outer common line is overlapped with the data line, having the passivation layer therebetween,

wherein the gate line, the data line, and the outer common line are formed by a resist printing process to have a straight rectangular shape, and

wherein the common electrode and the pixel electrode are formed by the resist printing process to have straight-line shapes and to be perpendicular to the outer common line and the gate line.

2. The liquid crystal display according to claim 1 , wherein the common electrode and the pixel electrode are formed in alternating positions.

3. A method of manufacturing a liquid crystal display, the method comprising the steps of:

forming a straight-line shaped gate line connected to a gate electrode on a substrate;

forming a straight-line shaped data line, wherein the data line intersects with the gate line to define a pixel;

forming a gate insulating layer on the substrate and the gate electrode;

forming a semiconductor layer on the gate insulating layer;

forming a source electrode and a drain electrode on the semiconductor layer;

forming a passivation layer on the substrate, source electrode, and the drain electrode;

forming a contact hole through the passivation layer to expose the drain electrode;

forming a pixel electrode to connect to the drain electrode through the contact hole;

forming an outer common line surrounding the pixel and formed on the passivation layer; and

forming a common electrode to connect to the outer common line,

wherein the pixel electrode and the common electrode are coplanar on the passivation layer,

wherein the outer common line is coplanar with pixel electrode and the common electrode,

wherein the outer common line is overlapped with the gate line, having the gate insulating layer and the passivation layer therebetween,

wherein the outer common line is overlapped with the data line, having the passivation layer therebetween,

wherein the gate line, the data line, and the outer common line are formed by a resist printing process to have a straight rectangular shape, and

wherein the common electrode and the pixel electrode are formed by the resist printing process to have straight-line shapes and to be perpendicular to the outer common line and the gate line.

4. The method according to claim 3 , wherein the common electrode and the pixel electrode are formed in alternating positions.

5. The method according to claim 3 , wherein the source electrode and the drain electrode are formed using a resist printing process.