IP Library Granted Patent US 7,573,251
Granted Patent B2
US 7,573,251 · App. 11/477,484 · Granted Aug 11, 2009

AC-to-DC voltage regulator

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Quick Facts
Patent No.
US 7,573,251
App. No.
11/477,484
Granted
Aug 11, 2009
Kind
B2
Abstract

The present invention provides a high efficiency voltage regulator. It includes an input transistor coupled to a voltage source to provide a supply voltage. A detection circuit is coupled to the voltage source and the supply voltage to generate a control signal and an enable signal in response to voltage levels of the voltage source and the supply voltage. A charge pump circuit is coupled to the detection circuit and the input transistor to turn on the input transistor in response to the control signal. A control transistor is connected to the detection circuit and the input transistor to turn off the input transistor in response to the control signal.

Claims (58)

1. A voltage regulator comprising:

an input transistor coupled to a voltage source to provide a supply voltage;

a detection circuit coupled to the voltage source and the supply voltage to generate a control signal and an enable signal in response to the voltage level of the voltage source and the voltage level of the supply voltage;

a charge pump circuit coupled to the detection circuit and the input transistor to turn on the input transistor in response to the control signal; and

a control transistor coupled to the detection circuit and the input transistor to turn off the input transistor in response to the control signal;

wherein the enable signal is utilized to turn on/off the output of the voltage regulator.

2. The voltage regulator as claimed in claim 1 , wherein the control signal of the detection circuit will disable the input transistor once the voltage level of the voltage source is higher than an input-over-voltage threshold.

3. The voltage regulator as claimed in claim 1 , wherein the control signal of the detection circuit will disable the input transistor once the voltage level of the supply voltage is higher than an output-over-voltage threshold.

4. The voltage regulator as claimed in claim 1 , where in the enable signal of the detection circuit will turn off the output of the voltage regulator once the voltage level of the supply voltage is lower than an output-under-voltage threshold.

5. The voltage regulator as claimed in claim 1 , wherein the detection circuit is coupled to the voltage source through a voltage divider.

6. The voltage regulator as claimed in claim 1 , wherein the charge pump circuit comprises:

an inverter buffer circuit coupled to the control signal;

a capacitor connected to the inverter buffer circuit;

a first diode coupled to the capacitor and the input transistor to turn on the input transistor in response to the control signal; and

a second diode coupled to the capacitor and the supply voltage to charge the capacitor when the input transistor is turned off.

7. A regulator comprising:

an input transistor coupled to a voltage source to provide a supply voltage;

a detection circuit coupled to the supply voltage to generate a control signal in response to the voltage level of the supply voltage;

a charge pump circuit connected to the detection circuit and the input transistor, the charge pump circuit receiving the control signal and controlled by the detection circuit to turn on the input transistor in response to the control signal; and

a control transistor coupled to the detection circuit and the input transistor to turn off the input transistor in response to the control signal.

8. The regulator as claimed in claim 7 , wherein the detection circuit further generates an enable signal in response to the voltage level of the supply voltage, the enable signal is utilized to turn on/off the output of the regulator.

9. The regulator as claimed in claim 8 , wherein the enable signal of the detection circuit will turn off the output of the regulator once the voltage level of the supply voltage is lower than an output-under-voltage threshold.

10. The regulator as claimed in claim 7 , wherein the control signal of the detection circuit will disable the input transistor once the voltage level of the supply voltage is higher than an output-over-voltage threshold.

11. The regulator as claimed in claim 7 , wherein the charge pump circuit comprises:

an inverter buffer circuit coupled to the control signal;

a capacitor connected to the inverter buffer circuit;

a first diode coupled to the capacitor and the input transistor to turn on the input transistor in response to the control signal; and

a second diode coupled to the capacitor and the supply voltage to charge the capacitor when the input transistor is turned off.

12. A regulation circuit comprising:

an input transistor coupled to a voltage source to provide a supply voltage;

a detection circuit coupled to the voltage source to generate a control signal in response to the voltage level of the voltage source;

a charge pump circuit connected to the detection circuit and the input transistor, the charge pump circuit receiving the control signal and controlled by the detection circuit to turn on the input transistor in response to the control signal; and

a control transistor coupled to the detection circuit and the input transistor to turn off the input transistor in response to the control signal.

13. The regulation circuit as claimed in claim 12 , wherein the control signal of the detection circuit will disable the input transistor once the voltage level of the voltage source is higher than an input-over-voltage threshold.

14. The regulation circuit as claimed in claim 12 , wherein the detection circuit is coupled to the voltage source through a voltage divider.

15. The regulation circuit as claimed in claim 12 , wherein the charge pump circuit comprises:

an inverter buffer circuit coupled to the control signal;

a capacitor connected to the inverter buffer circuit;

a first diode coupled to the capacitor and the input transistor to turn on the input transistor in response to the control signal; and

a second diode coupled to the capacitor and the supply voltage to charge the capacitor when the input transistor is turned off.

16. A voltage regulator comprising:

an input transistor providing a supply voltage in response to a voltage source;

a detection circuit generating a control signal and an enable signal in response to the voltage level of the voltage source and the voltage level of the supply voltage;

a charge pump circuit turning on the input transistor in response to the control signal; and

a control transistor turning off the input transistor in response to the control signal;

wherein the enable signal is utilized to turn on/off the output of the voltage regulator.

17. The voltage regulator as claimed in claim 16 , wherein the control signal of the detection circuit will disable the input transistor once the voltage level of the supply voltage is higher than an output-over-voltage threshold.

18. A regulator comprising:

an input transistor providing a supply voltage in response to a voltage source;

a detection circuit generating a control signal in response to the voltage level of the supply voltage;

a charge pump circuit connected to the detection circuit, the charge pump circuit receiving the control signal and controlled by the detection circuit to turn on the input transistor in response to the control signal; and

a control transistor coupled to turn off the input transistor in response to the control signal.

19. The regulator as claimed in claim 18 , wherein the detection circuit further generates an enable signal in response to the voltage level of the supply voltage, the enable signal will turn off the output of the regulator once the voltage level of the supply voltage is lower than an output-under-voltage threshold.

20. A regulation circuit comprising:

an input transistor providing a supply voltage in response to a voltage source;

a detection circuit generating a control signal in response to the voltage level of the voltage source;

a charge pump circuit connected to the detection circuit, the charge pump circuit receiving the control signal and controlled by the detection circuit to turn on the input transistor in response to the control signal; and

a control transistor coupled to turn off the input transistor in response to the control signal.

Assignments (4)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT RECORDED AT REEL 046410, FRAME 0933 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064072/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 22, 2018
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 046410/0933 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 25, 2017
From: FAIRCHILD (TAIWAN) CORPORATION (FORMERLY SYSTEM GENERAL CORPORATION)
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 042328/0318 →
CHANGE OF NAME Recorded Jun 8, 2016
From: SYSTEM GENERAL CORP.
To: FAIRCHILD (TAIWAN) CORPORATION
Reel/Frame 038906/0030 →