IP Library Granted Patent US 8,207,978
Granted Patent B2
US 8,207,978 · App. 11/478,796 · Granted Jun 26, 2012

Simplification of 3D texture address computation based on aligned, non-perspective objects

Assignee: Intel Corporation
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Quick Facts
Patent No.
US 8,207,978
App. No.
11/478,796
Granted
Jun 26, 2012
Kind
B2
Abstract

Apparatus, systems and methods for the simplification of 3D texture address computations based on aligned, non-perspective objects are disclosed. For example, a method is disclosed including receiving a texture address of a first pixel and determining a texture address of a second pixel by applying at least one offset to the texture address of the first pixel. Other implementations are also disclosed.

Claims (16)

1. A non-transitory computer readable medium having stored thereon instructions that, when executed by a machine, cause the machine to:

receive a texture address of a first pixel;

determine when a texture is aligned to pixels being rendered: and

if the texture is aligned, determine a texture address of a second pixel, such that the texture address of the second pixel is the texture address of the first pixel plus a constant and determine a texture address of a third pixel, such that the texture address of the third pixel is the texture address of the second pixel plus said constant.

2. The computer readable medium of claim 1 , wherein the constant value comprises a fixed number of units in texture coordinate space.

3. An apparatus comprising:

a hardware texture sampler to receive a texture address of a first pixel; and

hardware texture address generation logic to determine whether a texture is aligned to pixels being rendered, if so, determine a texture address of a second pixel by adding a constant to the texture address of the first pixel and determine a texture address of a third pixel by applying the constant to the texture address of the second pixel.

4. The apparatus of claim 3 , wherein the first pixel is adjacent to the second pixel.

5. A system comprising:

address generation logic to determine a texture address of a first pixel by adding a constant to a texture address of a second pixel and to determine a texture address of a third pixel by adding the constant to a texture address of the second pixel;

memory to store texture data; and

a texture sampler to fetch the texture data from memory in response to the texture address of the first pixel.

6. The system of claim 5 , wherein the memory comprises one of dynamic random access memory (DRAM), static random access memory (SRAM), or non-volatile memory.

7. The system of claim 5 , further comprising an antenna to receive the texture data.

8. The system of claim 7 , wherein the antenna comprises one of a dipole antenna, a narrowband Meander Line Antenna (MLA), a wideband MLA, an inverted “F” antenna, a planar inverted “F” antenna, a Goubau antenna, or a Patch antenna.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 22, 2007
From: SPANGLER, STEVEN J.; PLETCHER, BENJAMIN R.
To: INTEL CORPORATION
Reel/Frame 019992/0201 →
Continuity (1)
Related Publication 20080001964A1 · Jan 3, 2008