IP Library Granted Patent US 7,582,933
Granted Patent B2
US 7,582,933 · App. 11/483,561 · Granted Sep 1, 2009

Transistor with electrode-protecting insulating film

Assignees: NEC Corporation; NEC LCD Technologies, Ltd
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Quick Facts
Patent No.
US 7,582,933
App. No.
11/483,561
Granted
Sep 1, 2009
Kind
B2
Abstract

A base layer is formed on an insulating substrate, and a semiconductor layer is formed in localized fashion thereon. A gate insulating film is then formed so as to cover the semiconductor layer, and a gate electrode is formed on a portion of the gate insulating film. An impurity is then implanted into the semiconductor layer via the gate insulating film, and a source region, a drain region, and an LDD region are formed. The gate insulating film is etched with dilute hydrofluoric acid. An electrode-protecting insulating film is then formed so as to cover the gate electrode, and the entire surface of the surface layer portion of the electrode-protecting insulating film is etched away using dilute hydrofluoric acid. Carrier traps introduced into the electrode-protecting insulating film and the gate insulating film are thereby removed.

Claims (45)

1. A semiconductor device comprising:

a substrate;

a semiconductor layer formed on the substrate;

a gate insulating film formed on the semiconductor layer;

a gate electrode formed in a portion of the area directly above said semiconductor layer on the gate insulating film; and

an electrode-protecting insulating film formed on said gate insulating film and said gate electrode; wherein

a surface layer portion of said electrode-protecting insulating film is etched away after the electrode-protecting insulating film is formed,

wherein a film thickness of a portion other than an area directly under said gate electrode of said gate insulating film is smaller than a film thickness of a portion positioned in an area directly under said gate electrode, and

wherein a ratio (B/A) has a value between 0.01 to 0.65, where A is the film thickness of the portion positioned in the area directly under said gate electrode of said gate insulating film, and B is the difference between the film thickness of the portion positioned in the area directly under the gate electrode and the film thickness of the portion other than said area directly under the gate electrode.

2. A semiconductor device comprising:

a substrate;

a semiconductor layer formed on the substrate;

a gate insulating film formed on the semiconductor layer;

a gate electrode formed in a portion of the area directly above said semiconductor layer on the gate insulating film; and

an electrode-protecting insulating film formed on said gate insulating film and said gate electrode; wherein

a surface layer portion of said electrode-protecting insulating film is etched away after the electrode-protecting insulating film is formed,

wherein the film thickness of the portion other than the area directly under said gate electrode in said gate insulating film is smaller than the film thickness of the portion positioned in the area directly under said gate electrode, and

wherein the concentration of metal in the interface between said gate insulating film and said electrode-protecting insulating film is 1×10 11 atoms/cm 2 or less.

3. The semiconductor device according to claim 2 , wherein said metal is one or more types of metal selected from the group consisting of Al, Cr, Mo, W, Nb, Tar and Nd.

4. A semiconductor device comprising:

a substrate;

a semiconductor layer formed on the substrate;

a gate insulating film formed on the semiconductor layer;

a gate electrode formed in a portion of the area directly above said semiconductor layer on the gate insulating film; and

an electrode-protecting insulating film formed on said gate insulating film and said gate electrode; wherein

a surface layer portion of said electrode-protecting insulating film is etched away after the electrode-protecting insulating film is formed,

wherein the film thickness of the portion other than the area directly under said gate electrode in said gate insulating film is smaller than the film thickness of the portion positioned in the area directly under said gate electrode, and

wherein a source region, a drain region, and an LDD region are formed in said semiconductor layer, and the ratio (DTr/C LDD ) has a value of 0.4 or less, where Dtr is the surface density of carrier traps in the area directly above said LDD region of said gate insulating film, and C LDD is the volumetric concentration of carriers in said LDD region.

5. A semiconductor device comprising:

a substrate;

a semiconductor layer formed in localized fashion on the substrate;

a gate insulating film formed on the semiconductor layer;

a gate electrode formed in a portion of the area directly above said semiconductor layer on the gate insulating film; and

an electrode-protecting insulating film formed on said gate insulating film and said gate electrode; wherein

the concentration of metal in the interface between said gate insulating film and said electrode-protecting insulating film is 1×10 11 atoms/cm 2 or less.

6. A semiconductor device comprising:

a substrate;

a semiconductor layer formed in localized fashion on the substrate;

a gate insulating film formed on the semiconductor layer; and

a gate electrode formed in a portion of the area directly above said semiconductor layer on the gate insulating film; wherein

a source region, a drain region, and an LDD region are formed in said semiconductor layer; and

the ratio (Dtr/C L,DD ) has a value of 0.4 or less, where Dtr is the surface density of carrier traps in the area directly above said LDD region of said gate insulating film, and C LDD is the volumetric concentration of carriers in said LDD region.

7. The semiconductor device according to claim 1 , wherein the semiconductor layer comprises a source region, an Lightly Doped Drain (LDD) region and a drain region, and wherein the film thickness of the portion directly above the LDD region is smaller than the film thickness of the portion positioned in the area directly under said gate electrode.

8. The semiconductor device according to claim 1 , wherein the gate insulating film portion positioned in the area directly under said gate electrode corresponds to a protrusion formed only above the a channel region of the semiconductor layer, wherein the channel region is between two Lightly Doped Drain (LDD) regions of the semiconductor layer.

9. The semiconductor device according to claim 2 , wherein the concentration of metal in the interface between said gate insulating film and said electrode-protecting insulating film is 1×10 11 atoms/cm 2 or less and 2.8×10 10 atoms/cm 2 or more.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 23, 2016
From: NEC CORPORATION
To: NLT TECHNOLOGIES, LTD.
Reel/Frame 037798/0297 →
CHANGE OF NAME Recorded Nov 8, 2011
From: NEC LCD TECHNOLOGIES, LTD.
To: NLT TECHNOLOGIES, LTD.
Reel/Frame 027195/0933 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 11, 2006
From: MORI, SHIGERU; KORENARI, TAKAHIRO; MATSUZAKI, TADAHIRO; TANABE, HIROSHI
To: NEC CORPORATION; NEC LCD TECHNOLOGIES, LTD
Reel/Frame 018100/0117 →
Priority Claims (1)
JP 2005-202693 · Jul 12, 2005 · national
Continuity (1)
Related Publication 20070012924A1 · Jan 18, 2007